Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux

Pull embedded i2c changes from Wolfram Sang:
 "Changes for the "embedded" part of the I2C subsystem:

   - lots of devicetree conversions of drivers (and preparations for
     that)
   - big cleanups for drivers for OMAP, Tegra, Nomadik, Blackfin
   - Rafael's struct dev_pm_ops conversion patches for I2C
   - usual driver cleanups and fixes

  All patches have been in linux-next for an apropriate time and all
  patches touching files outside of i2c-folders should have proper acks
  from the maintainers."

* 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (60 commits)
  Revert "i2c: tegra: convert normal suspend/resume to *_noirq"
  I2C: MV64XYZ: Add Device Tree support
  i2c: stu300: use devm managed resources
  i2c: i2c-ocores: support for 16bit and 32bit IO
  V4L/DVB: mfd: use reg_shift instead of regstep
  i2c: i2c-ocores: Use reg-shift property
  i2c: i2c-ocores: DT bindings and minor fixes.
  i2c: mv64xxxx: remove EXPERIMENTAL tag
  i2c-s3c2410: Use plain pm_runtime_put()
  i2c: s3c2410: Fix pointer type passed to of_match_node()
  i2c: mxs: Set I2C timing registers for mxs-i2c
  i2c: i2c-bfin-twi: Move blackfin TWI register access Macro to head file.
  i2c: i2c-bfin-twi: Move TWI peripheral pin request array to platform data.
  i2c:i2c-bfin-twi: include twi head file
  i2c:i2c-bfin-twi: TWI fails to restart next transfer in high system load.
  i2c: i2c-bfin-twi: Tighten condition when failing I2C transfer if MEN bit is reset unexpectedly.
  i2c: i2c-bfin-twi: Break dead waiting loop if i2c device misbehaves.
  i2c: i2c-bfin-twi: Improve the patch for bug "Illegal i2c bus lock upon certain transfer scenarios".
  i2c: i2c-bfin-twi: Illegal i2c bus lock upon certain transfer scenarios.
  i2c-mv64xxxx: allow more than one driver instance
  ...

Conflicts:
	drivers/i2c/busses/i2c-nomadik.c

Documentation/devicetree/bindings/i2c/i2c-mxs.txt

@@ -4,6 +4,8 @@ Required properties:
 - compatible: Should be "fsl,<chip>-i2c"
 - reg: Should contain registers location and length
 - interrupts: Should contain ERROR and DMA interrupts
+- clock-frequency: Desired I2C bus clock frequency in Hz.
+                   Only 100000Hz and 400000Hz modes are supported.
 
 Examples:
 
@@ -13,4 +15,5 @@ i2c0: i2c@80058000 {
 	compatible = "fsl,imx28-i2c";
 	reg = <0x80058000 2000>;
 	interrupts = <111 68>;
+	clock-frequency = <100000>;
 };

Documentation/devicetree/bindings/i2c/i2c-ocores.txt

@@ -0,0 +1,33 @@
+Device tree configuration for i2c-ocores
+
+Required properties:
+- compatible      : "opencores,i2c-ocores"
+- reg             : bus address start and address range size of device
+- interrupts      : interrupt number
+- clock-frequency : frequency of bus clock in Hz
+- #address-cells  : should be <1>
+- #size-cells     : should be <0>
+
+Optional properties:
+- reg-shift       : device register offsets are shifted by this value
+- reg-io-width    : io register width in bytes (1, 2 or 4)
+- regstep         : deprecated, use reg-shift above
+
+Example:
+
+	i2c0: ocores@a0000000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "opencores,i2c-ocores";
+		reg = <0xa0000000 0x8>;
+		interrupts = <10>;
+		clock-frequency = <20000000>;
+
+		reg-shift = <0>;	/* 8 bit registers */
+		reg-io-width = <1>;	/* 8 bit read/write */
+
+		dummy@60 {
+			compatible = "dummy";
+			reg = <0x60>;
+		};
+	};

Documentation/devicetree/bindings/i2c/mrvl-i2c.txt

@@ -1,4 +1,4 @@
-* I2C
+* Marvell MMP I2C controller
 
 Required properties :
 
@@ -32,3 +32,20 @@ Examples:
 		interrupts = <58>;
 	};
 
+* Marvell MV64XXX I2C controller
+
+Required properties :
+
+ - reg             : Offset and length of the register set for the device
+ - compatible      : Should be "marvell,mv64xxx-i2c"
+ - interrupts      : The interrupt number
+ - clock-frequency : Desired I2C bus clock frequency in Hz.
+
+Examples:
+
+	i2c@11000 {
+		compatible = "marvell,mv64xxx-i2c";
+		reg = <0x11000 0x20>;
+		interrupts = <29>;
+		clock-frequency = <100000>;
+	};