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MIPS: Netlogic: XLP CPU support.

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Add support for Netlogic's XLP MIPS SoC. This patch adds:
* XLP processor ID in cpu_probe.c and asm/cpu.h
* XLP case to asm/module.h
* CPU_XLP case to mm/tlbex.c
* minor change to r4k cache handling to ignore XLP secondary cache
* XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2966/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Jayachandran C
2011-11-16 00:21:20 +00:00
committed by Ralf Baechle
parent 0be3d9bb14
commit a3d4fb2d2a
5 changed files with 37 additions and 8 deletions
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19
arch/mips/kernel/cpu-probe.c
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@@ -192,6 +192,7 @@ void __init check_wait(void)
case CPU_CAVIUM_OCTEON2:
case CPU_JZRISC:
case CPU_XLR:
case CPU_XLP:
cpu_wait = r4k_wait;
break;
@@ -1024,6 +1025,11 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
MIPS_CPU_LLSC);
switch (c->processor_id & 0xff00) {
case PRID_IMP_NETLOGIC_XLP832:
c->cputype = CPU_XLP;
__cpu_name[cpu] = "Netlogic XLP";
break;
case PRID_IMP_NETLOGIC_XLR732:
case PRID_IMP_NETLOGIC_XLR716:
case PRID_IMP_NETLOGIC_XLR532:
@@ -1054,14 +1060,21 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
break;
default:
printk(KERN_INFO "Unknown Netlogic chip id [%02x]!\n",
pr_info("Unknown Netlogic chip id [%02x]!\n",
c->processor_id);
c->cputype = CPU_XLR;
break;
}
c->isa_level = MIPS_CPU_ISA_M64R1;
c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1;
if (c->cputype == CPU_XLP) {
c->isa_level = MIPS_CPU_ISA_M64R2;
c->options |= (MIPS_CPU_FPU | MIPS_CPU_ULRI | MIPS_CPU_MCHECK);
/* This will be updated again after all threads are woken up */
c->tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;
} else {
c->isa_level = MIPS_CPU_ISA_M64R1;
c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1;
}
}
#ifdef CONFIG_64BIT