x86, MCE, AMD: Drop software-defined bank in error thresholding
Aravind had the good question about why we're assigning a
software-defined bank when reporting error thresholding errors instead
of simply using the bank which reports the last error causing the
overflow.
Digging through git history, it pointed to
9526866439
("[PATCH] x86_64: mce_amd support for family 0x10 processors")
which added that functionality. The problem with this, however, is that
tools don't know about software-defined banks and get puzzled. So drop
that K8_MCE_THRESHOLD_BASE and simply use the hw bank reporting the
thresholding interrupt.
Save us a couple of MSR reads while at it.
Reported-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
Link: https://lkml.kernel.org/r/5435B206.60402@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
@@ -78,7 +78,6 @@
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/* Software defined banks */
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#define MCE_EXTENDED_BANK 128
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#define MCE_THERMAL_BANK (MCE_EXTENDED_BANK + 0)
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#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1)
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#define MCE_LOG_LEN 32
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#define MCE_LOG_SIGNATURE "MACHINECHECK"
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