sh-pfc: Split pins and functions definition tables
Split the GPIOs table into a pins table for real GPIOs and a functions table for function GPIOs. Only register pins with the pinctrl core. The function GPIOs remain accessible as GPIOs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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@@ -306,7 +306,7 @@ static pinmux_enum_t shx3_pinmux_data[] = {
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PINMUX_DATA(IRQOUT_MARK, PH0_FN),
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};
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static struct pinmux_gpio shx3_pinmux_gpios[] = {
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static struct pinmux_pin shx3_pinmux_pins[] = {
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/* PA */
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PINMUX_GPIO(GPIO_PA7, PA7_DATA),
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PINMUX_GPIO(GPIO_PA6, PA6_DATA),
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@@ -384,7 +384,11 @@ static struct pinmux_gpio shx3_pinmux_gpios[] = {
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PINMUX_GPIO(GPIO_PH2, PH2_DATA),
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PINMUX_GPIO(GPIO_PH1, PH1_DATA),
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PINMUX_GPIO(GPIO_PH0, PH0_DATA),
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};
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#define PINMUX_FN_BASE ARRAY_SIZE(shx3_pinmux_pins)
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static struct pinmux_func shx3_pinmux_func_gpios[] = {
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/* FN */
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GPIO_FN(D31),
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GPIO_FN(D30),
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@@ -569,9 +573,10 @@ struct sh_pfc_soc_info shx3_pinmux_info = {
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PINMUX_INPUT_PULLUP_END },
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.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
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.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
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.gpios = shx3_pinmux_gpios,
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.nr_pins = GPIO_PH0 + 1,
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.nr_gpios = ARRAY_SIZE(shx3_pinmux_gpios),
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.pins = shx3_pinmux_pins,
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.nr_pins = ARRAY_SIZE(shx3_pinmux_pins),
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.func_gpios = shx3_pinmux_func_gpios,
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.nr_func_gpios = ARRAY_SIZE(shx3_pinmux_func_gpios),
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.gpio_data = shx3_pinmux_data,
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.gpio_data_size = ARRAY_SIZE(shx3_pinmux_data),
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.cfg_regs = shx3_pinmux_config_regs,
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