x86/kvm/hyper-v: add reenlightenment MSRs support
Nested Hyper-V/Windows guest running on top of KVM will use TSC page clocksource in two cases: - L0 exposes invariant TSC (CPUID.80000007H:EDX[8]). - L0 provides Hyper-V Reenlightenment support (CPUID.40000003H:EAX[13]). Exposing invariant TSC effectively blocks migration to hosts with different TSC frequencies, providing reenlightenment support will be needed when we start migrating nested workloads. Implement rudimentary support for reenlightenment MSRs. For now, these are just read/write MSRs with no effect. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Reviewed-by: Roman Kagan <rkagan@virtuozzo.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
This commit is contained in:

committed by
Paolo Bonzini

parent
ddd6f0e94d
commit
a2e164e7f4
@@ -737,6 +737,9 @@ static bool kvm_hv_msr_partition_wide(u32 msr)
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case HV_X64_MSR_CRASH_CTL:
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case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
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case HV_X64_MSR_RESET:
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case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
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case HV_X64_MSR_TSC_EMULATION_CONTROL:
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case HV_X64_MSR_TSC_EMULATION_STATUS:
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r = true;
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break;
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}
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@@ -982,6 +985,15 @@ static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
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kvm_make_request(KVM_REQ_HV_RESET, vcpu);
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}
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break;
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case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
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hv->hv_reenlightenment_control = data;
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break;
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case HV_X64_MSR_TSC_EMULATION_CONTROL:
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hv->hv_tsc_emulation_control = data;
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break;
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case HV_X64_MSR_TSC_EMULATION_STATUS:
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hv->hv_tsc_emulation_status = data;
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break;
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default:
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vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
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msr, data);
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@@ -1106,6 +1118,15 @@ static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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case HV_X64_MSR_RESET:
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data = 0;
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break;
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case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
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data = hv->hv_reenlightenment_control;
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break;
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case HV_X64_MSR_TSC_EMULATION_CONTROL:
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data = hv->hv_tsc_emulation_control;
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break;
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case HV_X64_MSR_TSC_EMULATION_STATUS:
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data = hv->hv_tsc_emulation_status;
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break;
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default:
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vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
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return 1;
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