powerpc/mm/book3s/radix: Add mapping statistics
Add statistics that show how memory is mapped within the kernel linear mapping.
This is similar to commit 37cd944c8d
("s390/pgtable: add mapping statistics")
We don't do this with Hash translation mode. Hash uses one size (mmu_linear_psize)
to map the kernel linear mapping and we print the linear psize during boot as
below.
"Page orders: linear mapping = 24, virtual = 16, io = 16, vmemmap = 24"
A sample output looks like:
DirectMap4k: 0 kB
DirectMap64k: 18432 kB
DirectMap2M: 1030144 kB
DirectMap1G: 11534336 kB
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:

committed by
Michael Ellerman

parent
241b5f7ffc
commit
a2dc009afa
@@ -227,4 +227,11 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
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#define check_pgt_cache() do { } while (0)
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extern atomic_long_t direct_pages_count[MMU_PAGE_COUNT];
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static inline void update_page_count(int psize, long count)
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{
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if (IS_ENABLED(CONFIG_PROC_FS))
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atomic_long_add(count, &direct_pages_count[psize]);
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}
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#endif /* _ASM_POWERPC_BOOK3S_64_PGALLOC_H */
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@@ -32,6 +32,9 @@
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#define RADIX_PUD_BAD_BITS 0x60000000000000e0UL
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#define RADIX_PGD_BAD_BITS 0x60000000000000e0UL
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#define RADIX_PMD_SHIFT (PAGE_SHIFT + RADIX_PTE_INDEX_SIZE)
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#define RADIX_PUD_SHIFT (RADIX_PMD_SHIFT + RADIX_PMD_INDEX_SIZE)
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#define RADIX_PGD_SHIFT (RADIX_PUD_SHIFT + RADIX_PUD_INDEX_SIZE)
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/*
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* Size of EA range mapped by our pagetables.
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*/
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