[POWERPC] mpc5200: Switch mpc5200 dts files to dts-v1 format
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Grant Likely
@@ -10,6 +10,8 @@
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "tqc,tqm5200";
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compatible = "tqc,tqm5200";
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@@ -23,10 +25,10 @@
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PowerPC,5200@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>;
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i-cache-line-size = <20>;
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d-cache-size = <4000>; // L1, 16K
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i-cache-size = <4000>; // L1, 16K
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <0x4000>; // L1, 16K
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i-cache-size = <0x4000>; // L1, 16K
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timebase-frequency = <0>; // from bootloader
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bus-frequency = <0>; // from bootloader
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clock-frequency = <0>; // from bootloader
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@@ -35,21 +37,21 @@
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memory {
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device_type = "memory";
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reg = <00000000 04000000>; // 64MB
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reg = <0x00000000 0x04000000>; // 64MB
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};
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soc5200@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc5200-immr";
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ranges = <0 f0000000 0000c000>;
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reg = <f0000000 00000100>;
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ranges = <0 0xf0000000 0x0000c000>;
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reg = <0xf0000000 0x00000100>;
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bus-frequency = <0>; // from bootloader
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system-frequency = <0>; // from bootloader
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cdm@200 {
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compatible = "fsl,mpc5200-cdm";
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reg = <200 38>;
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reg = <0x200 0x38>;
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};
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mpc5200_pic: interrupt-controller@500 {
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@@ -57,12 +59,12 @@
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interrupt-controller;
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#interrupt-cells = <3>;
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compatible = "fsl,mpc5200-pic";
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reg = <500 80>;
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reg = <0x500 0x80>;
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};
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timer@600 { // General Purpose Timer
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compatible = "fsl,mpc5200-gpt";
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reg = <600 10>;
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reg = <0x600 0x10>;
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interrupts = <1 9 0>;
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interrupt-parent = <&mpc5200_pic>;
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fsl,has-wdt;
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@@ -70,38 +72,38 @@
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gpio@b00 {
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compatible = "fsl,mpc5200-gpio";
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reg = <b00 40>;
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reg = <0xb00 0x40>;
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interrupts = <1 7 0>;
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interrupt-parent = <&mpc5200_pic>;
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};
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usb@1000 {
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compatible = "fsl,mpc5200-ohci","ohci-be";
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reg = <1000 ff>;
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reg = <0x1000 0xff>;
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interrupts = <2 6 0>;
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interrupt-parent = <&mpc5200_pic>;
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};
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dma-controller@1200 {
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compatible = "fsl,mpc5200-bestcomm";
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reg = <1200 80>;
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reg = <0x1200 0x80>;
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interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
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3 4 0 3 5 0 3 6 0 3 7 0
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3 8 0 3 9 0 3 a 0 3 b 0
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3 c 0 3 d 0 3 e 0 3 f 0>;
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3 8 0 3 9 0 3 10 0 3 11 0
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3 12 0 3 13 0 3 14 0 3 15 0>;
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interrupt-parent = <&mpc5200_pic>;
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};
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xlb@1f00 {
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compatible = "fsl,mpc5200-xlb";
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reg = <1f00 100>;
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reg = <0x1f00 0x100>;
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};
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serial@2000 { // PSC1
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device_type = "serial";
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compatible = "fsl,mpc5200-psc-uart";
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port-number = <0>; // Logical port assignment
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reg = <2000 100>;
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reg = <0x2000 0x100>;
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interrupts = <2 1 0>;
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interrupt-parent = <&mpc5200_pic>;
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};
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@@ -110,7 +112,7 @@
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device_type = "serial";
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compatible = "fsl,mpc5200-psc-uart";
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port-number = <1>; // Logical port assignment
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reg = <2200 100>;
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reg = <0x2200 0x100>;
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interrupts = <2 2 0>;
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interrupt-parent = <&mpc5200_pic>;
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};
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@@ -119,7 +121,7 @@
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device_type = "serial";
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compatible = "fsl,mpc5200-psc-uart";
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port-number = <2>; // Logical port assignment
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reg = <2400 100>;
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reg = <0x2400 0x100>;
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interrupts = <2 3 0>;
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interrupt-parent = <&mpc5200_pic>;
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};
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@@ -127,7 +129,7 @@
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ethernet@3000 {
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device_type = "network";
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compatible = "fsl,mpc5200-fec";
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reg = <3000 400>;
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reg = <0x3000 0x400>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <2 5 0>;
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interrupt-parent = <&mpc5200_pic>;
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@@ -137,8 +139,8 @@
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mdio@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
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reg = <3000 400>; // fec range, since we need to setup fec interrupts
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compatible = "fsl,mpc5200-mdio";
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reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
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interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
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interrupt-parent = <&mpc5200_pic>;
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@@ -150,7 +152,7 @@
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ata@3a00 {
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compatible = "fsl,mpc5200-ata";
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reg = <3a00 100>;
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reg = <0x3a00 0x100>;
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interrupts = <2 7 0>;
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interrupt-parent = <&mpc5200_pic>;
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};
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@@ -159,21 +161,21 @@
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5200-i2c","fsl-i2c";
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reg = <3d40 40>;
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interrupts = <2 10 0>;
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reg = <0x3d40 0x40>;
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interrupts = <2 16 0>;
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interrupt-parent = <&mpc5200_pic>;
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fsl5200-clocking;
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rtc@68 {
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device_type = "rtc";
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compatible = "dallas,ds1307";
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reg = <68>;
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reg = <0x68>;
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};
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};
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sram@8000 {
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compatible = "fsl,mpc5200-sram";
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reg = <8000 4000>;
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reg = <0x8000 0x4000>;
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};
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};
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@@ -182,11 +184,11 @@
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compatible = "fsl,lpb";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 fc000000 02000000>;
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ranges = <0 0 0xfc000000 0x02000000>;
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flash@0,0 {
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compatible = "cfi-flash";
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reg = <0 0 02000000>;
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reg = <0 0 0x02000000>;
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bank-width = <4>;
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device-width = <2>;
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#size-cells = <1>;
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@@ -200,18 +202,18 @@
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#address-cells = <3>;
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device_type = "pci";
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compatible = "fsl,mpc5200-pci";
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reg = <f0000d00 100>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
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c000 0 0 2 &mpc5200_pic 0 0 3
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c000 0 0 3 &mpc5200_pic 0 0 3
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c000 0 0 4 &mpc5200_pic 0 0 3>;
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reg = <0xf0000d00 0x100>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
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0xc000 0 0 2 &mpc5200_pic 0 0 3
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0xc000 0 0 3 &mpc5200_pic 0 0 3
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0xc000 0 0 4 &mpc5200_pic 0 0 3>;
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clock-frequency = <0>; // From boot loader
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interrupts = <2 8 0 2 9 0 2 a 0>;
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interrupts = <2 8 0 2 9 0 2 10 0>;
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interrupt-parent = <&mpc5200_pic>;
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bus-range = <0 0>;
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ranges = <42000000 0 80000000 80000000 0 10000000
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02000000 0 90000000 90000000 0 10000000
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01000000 0 00000000 a0000000 0 01000000>;
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ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
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0x02000000 0 0x90000000 0x90000000 0 0x10000000
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0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
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};
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};
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