PCI/portdrv: Support multiple interrupts for MSI as well as MSI-X

Root Ports can generate several different interrupts using either MSI or
MSI-X, but we only support that for MSI-X.  Ports that support MSI but not
MSI-X are currently limited to sharing a single interrupt.

Rename pcie_port_enable_msix() to pcie_port_enable_irq_vec() and extend it
to support multiple interrupts using either MSI-X (preferred) or MSI.

Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
[bhelgaas: changelog, reword comments, simplify PME/hotplug no-MSI logic]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
This commit is contained in:
Gabriele Paoloni
2017-05-23 15:23:58 +01:00
committed by Bjorn Helgaas
parent 2ea659a9ef
commit a1d5f18caf
2 changed files with 49 additions and 35 deletions

View File

@@ -13,10 +13,11 @@
#define PCIE_PORT_DEVICE_MAXSERVICES 5
/*
* According to the PCI Express Base Specification 2.0, the indices of
* the MSI-X table entries used by port services must not exceed 31
* The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
* be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI
* supports a maximum of 32 vectors per function.
*/
#define PCIE_PORT_MAX_MSIX_ENTRIES 32
#define PCIE_PORT_MAX_MSI_ENTRIES 32
#define get_descriptor_id(type, service) (((type - 4) << 8) | service)