crypto: caam - select DMA address size at runtime

i.MX8 mScale SoC still use 32-bit addresses in its CAAM implmentation,
so we can't rely on sizeof(dma_addr_t) to detemine CAAM pointer
size. Convert the code to query CTPR and MCFGR for that during driver
probing.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Chris Spencer <christopher.spencer@sea.co.uk>
Cc: Cory Tusar <cory.tusar@zii.aero>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Horia Geantă <horia.geanta@nxp.com>
Cc: Aymen Sghaier <aymen.sghaier@nxp.com>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: linux-crypto@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Andrey Smirnov
2019-08-20 13:23:59 -07:00
committed by Herbert Xu
parent dff36801a9
commit a1cf573ee9
7 changed files with 63 additions and 26 deletions

View File

@@ -136,9 +136,15 @@ static inline void init_job_desc_pdb(u32 * const desc, u32 options,
static inline void append_ptr(u32 * const desc, dma_addr_t ptr)
{
dma_addr_t *offset = (dma_addr_t *)desc_end(desc);
if (caam_ptr_sz == sizeof(dma_addr_t)) {
dma_addr_t *offset = (dma_addr_t *)desc_end(desc);
*offset = cpu_to_caam_dma(ptr);
*offset = cpu_to_caam_dma(ptr);
} else {
u32 *offset = (u32 *)desc_end(desc);
*offset = cpu_to_caam_dma(ptr);
}
(*desc) = cpu_to_caam32(caam32_to_cpu(*desc) +
CAAM_PTR_SZ / CAAM_CMD_SZ);