sh: shared div4 clock code
Add shared code for 4-bit divisor clocks. Processor specific code can use SH_CLK_DIV4() to initialize div4 clocks, and then use sh_clk_div4_register() for registration. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@@ -3,6 +3,7 @@
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#include <linux/list.h>
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#include <linux/seq_file.h>
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#include <linux/cpufreq.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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@@ -41,6 +42,7 @@ struct clk {
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unsigned long arch_flags;
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void *priv;
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struct dentry *dentry;
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struct cpufreq_frequency_table *freq_table;
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};
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struct clk_lookup {
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@@ -130,4 +132,17 @@ long clk_rate_table_round(struct clk *clk,
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int sh_clk_mstp32_register(struct clk *clks, int nr);
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#define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags) \
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{ \
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.name = _name, \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_reg, \
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.enable_bit = _shift, \
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.arch_flags = _div_bitmap, \
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.flags = _flags, \
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}
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int sh_clk_div4_register(struct clk *clks, int nr,
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struct clk_div_mult_table *table);
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#endif /* __ASM_SH_CLOCK_H */
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