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drm/amdgpu/soc15: initialize reg base for navi14 (v2)

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Initialize the IP register base offsets for navi14.

v2: squash in MP, CLK, THM updates

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Xiaojie Yuan
2018-12-17 18:24:03 +08:00
committed by Alex Deucher
parent e2d2607f90
commit a0f6d926f1
5 changed files with 1177 additions and 1 deletions
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drivers/gpu/drm/amd/amdgpu/nv.h
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@@ -30,4 +30,5 @@ void nv_grbm_select(struct amdgpu_device *adev,
u32 me, u32 pipe, u32 queue, u32 vmid);
int nv_set_ip_blocks(struct amdgpu_device *adev);
int navi10_reg_base_init(struct amdgpu_device *adev);
int navi14_reg_base_init(struct amdgpu_device *adev);
#endif