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[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach

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This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
2008-08-05 16:14:15 +01:00
committed by Russell King
parent a1b81a84ff
commit a09e64fbc0
1582 changed files with 3001 additions and 3020 deletions
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140
arch/arm/mach-rpc/include/mach/acornfb.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/acornfb.h
*
* Copyright (C) 1999 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* AcornFB architecture specific code
*/
#define acornfb_bandwidth(var) ((var)->pixclock * 8 / (var)->bits_per_pixel)
static inline int
acornfb_valid_pixrate(struct fb_var_screeninfo *var)
{
u_long limit;
if (!var->pixclock)
return 0;
/*
* Limits below are taken from RISC OS bandwidthlimit file
*/
if (current_par.using_vram) {
if (current_par.vram_half_sam == 2048)
limit = 6578;
else
limit = 13157;
} else {
limit = 26315;
}
return acornfb_bandwidth(var) >= limit;
}
/*
* Try to find the best PLL parameters for the pixel clock.
* This algorithm seems to give best predictable results,
* and produces the same values as detailed in the VIDC20
* data sheet.
*/
static inline u_int
acornfb_vidc20_find_pll(u_int pixclk)
{
u_int r, best_r = 2, best_v = 2;
int best_d = 0x7fffffff;
for (r = 2; r <= 32; r++) {
u_int rr, v, p;
int d;
rr = 41667 * r;
v = (rr + pixclk / 2) / pixclk;
if (v > 32 || v < 2)
continue;
p = (rr + v / 2) / v;
d = pixclk - p;
if (d < 0)
d = -d;
if (d < best_d) {
best_d = d;
best_v = v - 1;
best_r = r - 1;
}
if (d == 0)
break;
}
return best_v << 8 | best_r;
}
static inline void
acornfb_vidc20_find_rates(struct vidc_timing *vidc,
struct fb_var_screeninfo *var)
{
u_int div;
/* Select pixel-clock divisor to keep PLL in range */
div = var->pixclock / 9090; /*9921*/
/* Limit divisor */
if (div == 0)
div = 1;
if (div > 8)
div = 8;
/* Encode divisor to VIDC20 setting */
switch (div) {
case 1: vidc->control |= VIDC20_CTRL_PIX_CK; break;
case 2: vidc->control |= VIDC20_CTRL_PIX_CK2; break;
case 3: vidc->control |= VIDC20_CTRL_PIX_CK3; break;
case 4: vidc->control |= VIDC20_CTRL_PIX_CK4; break;
case 5: vidc->control |= VIDC20_CTRL_PIX_CK5; break;
case 6: vidc->control |= VIDC20_CTRL_PIX_CK6; break;
case 7: vidc->control |= VIDC20_CTRL_PIX_CK7; break;
case 8: vidc->control |= VIDC20_CTRL_PIX_CK8; break;
}
/*
* With VRAM, the FIFO can be set to the highest possible setting
* because there are no latency considerations for other memory
* accesses. However, in 64 bit bus mode the FIFO preload value
* must not be set to VIDC20_CTRL_FIFO_28 because this will let
* the FIFO overflow. See VIDC20 manual page 33 (6.0 Setting the
* FIFO preload value).
*/
if (current_par.using_vram) {
if (current_par.vram_half_sam == 2048)
vidc->control |= VIDC20_CTRL_FIFO_24;
else
vidc->control |= VIDC20_CTRL_FIFO_28;
} else {
unsigned long bandwidth = acornfb_bandwidth(var);
/* Encode bandwidth as VIDC20 setting */
if (bandwidth > 33334) /* < 30.0MB/s */
vidc->control |= VIDC20_CTRL_FIFO_16;
else if (bandwidth > 26666) /* < 37.5MB/s */
vidc->control |= VIDC20_CTRL_FIFO_20;
else if (bandwidth > 22222) /* < 45.0MB/s */
vidc->control |= VIDC20_CTRL_FIFO_24;
else /* > 45.0MB/s */
vidc->control |= VIDC20_CTRL_FIFO_28;
}
/* Find the PLL values */
vidc->pll_ctl = acornfb_vidc20_find_pll(var->pixclock / div);
}
#define acornfb_default_control() (VIDC20_CTRL_PIX_VCLK)
#define acornfb_default_econtrol() (VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3))

25
arch/arm/mach-rpc/include/mach/debug-macro.S Normal file
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/* arch/arm/mach-rpc/include/mach/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x03000000
movne \rx, #0xe0000000
orr \rx, \rx, #0x00010000
orr \rx, \rx, #0x00000fe0
.endm
#define UART_SHIFT 2
#define FLOW_CONTROL
#include <asm/hardware/debug-8250.S>

33
arch/arm/mach-rpc/include/mach/dma.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/dma.h
*
* Copyright (C) 1997 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
/*
* This is the maximum DMA address that can be DMAd to.
* There should not be more than (0xd0000000 - 0xc0000000)
* bytes of RAM.
*/
#define MAX_DMA_ADDRESS 0xd0000000
#define MAX_DMA_CHANNELS 8
#define DMA_0 0
#define DMA_1 1
#define DMA_2 2
#define DMA_3 3
#define DMA_S0 4
#define DMA_S1 5
#define DMA_VIRTUAL_FLOPPY 6
#define DMA_VIRTUAL_SOUND 7
#define DMA_FLOPPY DMA_VIRTUAL_FLOPPY
#endif /* _ASM_ARCH_DMA_H */

16
arch/arm/mach-rpc/include/mach/entry-macro.S Normal file
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#include <mach/hardware.h>
#include <asm/hardware/entry-macro-iomd.S>
.equ ioc_base_high, IOC_BASE & 0xff000000
.equ ioc_base_low, IOC_BASE & 0x00ff0000
.macro get_irqnr_preamble, base, tmp
mov \base, #ioc_base_high @ point at IOC
.if ioc_base_low
orr \base, \base, #ioc_base_low
.endif
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm

83
arch/arm/mach-rpc/include/mach/hardware.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/hardware.h
*
* Copyright (C) 1996-1999 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This file contains the hardware definitions of the RiscPC series machines.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <mach/memory.h>
#ifndef __ASSEMBLY__
#define IOMEM(x) ((void __iomem *)(unsigned long)(x))
#else
#define IOMEM(x) x
#endif /* __ASSEMBLY__ */
/*
* What hardware must be present
*/
#define HAS_IOMD
#define HAS_VIDC20
/* Hardware addresses of major areas.
* *_START is the physical address
* *_SIZE is the size of the region
* *_BASE is the virtual address
*/
#define RAM_SIZE 0x10000000
#define RAM_START 0x10000000
#define EASI_SIZE 0x08000000 /* EASI I/O */
#define EASI_START 0x08000000
#define EASI_BASE 0xe5000000
#define IO_START 0x03000000 /* I/O */
#define IO_SIZE 0x01000000
#define IO_BASE IOMEM(0xe0000000)
#define SCREEN_START 0x02000000 /* VRAM */
#define SCREEN_END 0xdfc00000
#define SCREEN_BASE 0xdf800000
#define UNCACHEABLE_ADDR 0xdf010000
/*
* IO Addresses
*/
#define VIDC_BASE IOMEM(0xe0400000)
#define EXPMASK_BASE 0xe0360000
#define IOMD_BASE IOMEM(0xe0200000)
#define IOC_BASE IOMEM(0xe0200000)
#define PCIO_BASE IOMEM(0xe0010000)
#define FLOPPYDMA_BASE IOMEM(0xe002a000)
#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
#define IO_EC_EASI_BASE 0x81400000
#define IO_EC_IOC4_BASE 0x8009c000
#define IO_EC_IOC_BASE 0x80090000
#define IO_EC_MEMC8_BASE 0x8000ac00
#define IO_EC_MEMC_BASE 0x80000000
#define NETSLOT_BASE 0x0302b000
#define NETSLOT_SIZE 0x00001000
#define PODSLOT_IOC0_BASE 0x03240000
#define PODSLOT_IOC4_BASE 0x03270000
#define PODSLOT_IOC_SIZE (1 << 14)
#define PODSLOT_MEMC_BASE 0x03000000
#define PODSLOT_MEMC_SIZE (1 << 14)
#define PODSLOT_EASI_BASE 0x08000000
#define PODSLOT_EASI_SIZE (1 << 24)
#define EXPMASK_STATUS (EXPMASK_BASE + 0x00)
#define EXPMASK_ENABLE (EXPMASK_BASE + 0x04)
#endif

258
arch/arm/mach-rpc/include/mach/io.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/io.h
*
* Copyright (C) 1997 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 06-Dec-1997 RMK Created.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
/*
* GCC is totally crap at loading/storing data. We try to persuade it
* to do the right thing by using these whereever possible instead of
* the above.
*/
#define __arch_base_getb(b,o) \
({ \
unsigned int __v, __r = (b); \
__asm__ __volatile__( \
"ldrb %0, [%1, %2]" \
: "=r" (__v) \
: "r" (__r), "Ir" (o)); \
__v; \
})
#define __arch_base_getl(b,o) \
({ \
unsigned int __v, __r = (b); \
__asm__ __volatile__( \
"ldr %0, [%1, %2]" \
: "=r" (__v) \
: "r" (__r), "Ir" (o)); \
__v; \
})
#define __arch_base_putb(v,b,o) \
({ \
unsigned int __r = (b); \
__asm__ __volatile__( \
"strb %0, [%1, %2]" \
: \
: "r" (v), "r" (__r), "Ir" (o));\
})
#define __arch_base_putl(v,b,o) \
({ \
unsigned int __r = (b); \
__asm__ __volatile__( \
"str %0, [%1, %2]" \
: \
: "r" (v), "r" (__r), "Ir" (o));\
})
/*
* We use two different types of addressing - PC style addresses, and ARM
* addresses. PC style accesses the PC hardware with the normal PC IO
* addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
* and are translated to the start of IO. Note that all addresses are
* shifted left!
*/
#define __PORT_PCIO(x) (!((x) & 0x80000000))
/*
* Dynamic IO functions.
*/
static inline void __outb (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"strb %1, [%0, %2, lsl #2] @ outb"
: "=&r" (temp)
: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
static inline void __outw (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"str %1, [%0, %2, lsl #2] @ outw"
: "=&r" (temp)
: "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
static inline void __outl (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"str %1, [%0, %2, lsl #2] @ outl"
: "=&r" (temp)
: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
#define DECLARE_DYN_IN(sz,fnsuffix,instr) \
static inline unsigned sz __in##fnsuffix (unsigned int port) \
{ \
unsigned long temp, value; \
__asm__ __volatile__( \
"tst %2, #0x80000000\n\t" \
"mov %0, %4\n\t" \
"addeq %0, %0, %3\n\t" \
"ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \
: "=&r" (temp), "=r" (value) \
: "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
: "cc"); \
return (unsigned sz)value; \
}
static inline void __iomem *__deprecated __ioaddr(unsigned int port)
{
void __iomem *ret;
if (__PORT_PCIO(port))
ret = PCIO_BASE;
else
ret = IO_BASE;
return ret + (port << 2);
}
#define DECLARE_IO(sz,fnsuffix,instr) \
DECLARE_DYN_IN(sz,fnsuffix,instr)
DECLARE_IO(char,b,"b")
DECLARE_IO(short,w,"")
DECLARE_IO(int,l,"")
#undef DECLARE_IO
#undef DECLARE_DYN_IN
/*
* Constant address IO functions
*
* These have to be macros for the 'J' constraint to work -
* +/-4096 immediate operand.
*/
#define __outbc(value,port) \
({ \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"strb %0, [%1, %2] @ outbc" \
: : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"strb %0, [%1, %2] @ outbc" \
: : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
})
#define __inbc(port) \
({ \
unsigned char result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldrb %0, [%1, %2] @ inbc" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldrb %0, [%1, %2] @ inbc" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result; \
})
#define __outwc(value,port) \
({ \
unsigned long __v = value; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"str %0, [%1, %2] @ outwc" \
: : "r" (__v|__v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"str %0, [%1, %2] @ outwc" \
: : "r" (__v|__v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
})
#define __inwc(port) \
({ \
unsigned short result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldr %0, [%1, %2] @ inwc" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldr %0, [%1, %2] @ inwc" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result & 0xffff; \
})
#define __outlc(value,port) \
({ \
unsigned long __v = value; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"str %0, [%1, %2] @ outlc" \
: : "r" (__v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"str %0, [%1, %2] @ outlc" \
: : "r" (__v), "r" (IO_BASE), "r" ((port) << 2)); \
})
#define __inlc(port) \
({ \
unsigned long result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldr %0, [%1, %2] @ inlc" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldr %0, [%1, %2] @ inlc" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result; \
})
#define __ioaddrc(port) __ioaddr(port)
#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
/* the following macro is deprecated */
#define ioaddr(port) ((unsigned long)__ioaddr((port)))
#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
/*
* 1:1 mapping for ioremapped regions.
*/
#define __mem_pci(x) (x)
#endif

46
arch/arm/mach-rpc/include/mach/irqs.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/irqs.h
*
* Copyright (C) 1996 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define IRQ_PRINTER 0
#define IRQ_BATLOW 1
#define IRQ_FLOPPYINDEX 2
#define IRQ_VSYNCPULSE 3
#define IRQ_POWERON 4
#define IRQ_TIMER0 5
#define IRQ_TIMER1 6
#define IRQ_IMMEDIATE 7
#define IRQ_EXPCARDFIQ 8
#define IRQ_HARDDISK 9
#define IRQ_SERIALPORT 10
#define IRQ_FLOPPYDISK 12
#define IRQ_EXPANSIONCARD 13
#define IRQ_KEYBOARDTX 14
#define IRQ_KEYBOARDRX 15
#define IRQ_DMA0 16
#define IRQ_DMA1 17
#define IRQ_DMA2 18
#define IRQ_DMA3 19
#define IRQ_DMAS0 20
#define IRQ_DMAS1 21
#define FIQ_FLOPPYDATA 0
#define FIQ_ECONET 2
#define FIQ_SERIALPORT 4
#define FIQ_EXPANSIONCARD 6
#define FIQ_FORCE 7
/*
* This is the offset of the FIQ "IRQ" numbers
*/
#define FIQ_START 64
#define IRQ_TIMER IRQ_TIMER0

39
arch/arm/mach-rpc/include/mach/memory.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/memory.h
*
* Copyright (C) 1996,1997,1998 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 20-Oct-1996 RMK Created
* 31-Dec-1997 RMK Fixed definitions to reduce warnings
* 11-Jan-1998 RMK Uninlined to reduce hits on cache
* 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
* 21-Mar-1999 RMK Renamed to memory.h
* RMK Added TASK_SIZE and PAGE_OFFSET
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x10000000)
/*
* These are exactly the same on the RiscPC as the
* physical memory view.
*/
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
/*
* Cache flushing area - ROM
*/
#define FLUSH_BASE_PHYS 0x00000000
#define FLUSH_BASE 0xdf000000
#endif

27
arch/arm/mach-rpc/include/mach/system.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/system.h
*
* Copyright (C) 1996-1999 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <mach/hardware.h>
#include <asm/hardware/iomd.h>
#include <asm/io.h>
static inline void arch_idle(void)
{
cpu_do_idle();
}
static inline void arch_reset(char mode)
{
iomd_writeb(0, IOMD_ROMCR0);
/*
* Jump into the ROM
*/
cpu_reset(0);
}

17
arch/arm/mach-rpc/include/mach/timex.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/timex.h
*
* Copyright (C) 1997, 1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* RiscPC architecture timex specifications
*/
/*
* On the RiscPC, the clock ticks at 2MHz.
*/
#define CLOCK_TICK_RATE 2000000

198
arch/arm/mach-rpc/include/mach/uncompress.h Normal file
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/*
* arch/arm/mach-rpc/include/mach/uncompress.h
*
* Copyright (C) 1996 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define VIDMEM ((char *)SCREEN_START)
#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/setup.h>
#include <asm/page.h>
int video_size_row;
unsigned char bytes_per_char_h;
extern unsigned long con_charconvtable[256];
struct param_struct {
unsigned long page_size;
unsigned long nr_pages;
unsigned long ramdisk_size;
unsigned long mountrootrdonly;
unsigned long rootdev;
unsigned long video_num_cols;
unsigned long video_num_rows;
unsigned long video_x;
unsigned long video_y;
unsigned long memc_control_reg;
unsigned char sounddefault;
unsigned char adfsdrives;
unsigned char bytes_per_char_h;
unsigned char bytes_per_char_v;
unsigned long unused[256/4-11];
};
static const unsigned long palette_4[16] = {
0x00000000,
0x000000cc,
0x0000cc00, /* Green */
0x0000cccc, /* Yellow */
0x00cc0000, /* Blue */
0x00cc00cc, /* Magenta */
0x00cccc00, /* Cyan */
0x00cccccc, /* White */
0x00000000,
0x000000ff,
0x0000ff00,
0x0000ffff,
0x00ff0000,
0x00ff00ff,
0x00ffff00,
0x00ffffff
};
#define palette_setpixel(p) *(unsigned long *)(IO_START+0x00400000) = 0x10000000|((p) & 255)
#define palette_write(v) *(unsigned long *)(IO_START+0x00400000) = 0x00000000|((v) & 0x00ffffff)
/*
* params_phys is a linker defined symbol - see
* arch/arm/boot/compressed/Makefile
*/
extern __attribute__((pure)) struct param_struct *params(void);
#define params (params())
#ifndef STANDALONE_DEBUG
static unsigned long video_num_cols;
static unsigned long video_num_rows;
static unsigned long video_x;
static unsigned long video_y;
static unsigned char bytes_per_char_v;
static int white;
/*
* This does not append a newline
*/
static void putc(int c)
{
extern void ll_write_char(char *, char c, char white);
int x,y;
char *ptr;
x = video_x;
y = video_y;
if (c == '\n') {
if (++y >= video_num_rows)
y--;
} else if (c == '\r') {
x = 0;
} else {
ptr = VIDMEM + ((y*video_num_cols*bytes_per_char_v+x)*bytes_per_char_h);
ll_write_char(ptr, c, white);
if (++x >= video_num_cols) {
x = 0;
if ( ++y >= video_num_rows ) {
y--;
}
}
}
video_x = x;
video_y = y;
}
static inline void flush(void)
{
}
static void error(char *x);
/*
* Setup for decompression
*/
static void arch_decomp_setup(void)
{
int i;
struct tag *t = (struct tag *)params;
unsigned int nr_pages = 0, page_size = PAGE_SIZE;
if (t->hdr.tag == ATAG_CORE)
{
for (; t->hdr.size; t = tag_next(t))
{
if (t->hdr.tag == ATAG_VIDEOTEXT)
{
video_num_rows = t->u.videotext.video_lines;
video_num_cols = t->u.videotext.video_cols;
bytes_per_char_h = t->u.videotext.video_points;
bytes_per_char_v = t->u.videotext.video_points;
video_x = t->u.videotext.x;
video_y = t->u.videotext.y;
}
if (t->hdr.tag == ATAG_MEM)
{
page_size = PAGE_SIZE;
nr_pages += (t->u.mem.size / PAGE_SIZE);
}
}
}
else
{
nr_pages = params->nr_pages;
page_size = params->page_size;
video_num_rows = params->video_num_rows;
video_num_cols = params->video_num_cols;
video_x = params->video_x;
video_y = params->video_y;
bytes_per_char_h = params->bytes_per_char_h;
bytes_per_char_v = params->bytes_per_char_v;
}
video_size_row = video_num_cols * bytes_per_char_h;
if (bytes_per_char_h == 4)
for (i = 0; i < 256; i++)
con_charconvtable[i] =
(i & 128 ? 1 << 0 : 0) |
(i & 64 ? 1 << 4 : 0) |
(i & 32 ? 1 << 8 : 0) |
(i & 16 ? 1 << 12 : 0) |
(i & 8 ? 1 << 16 : 0) |
(i & 4 ? 1 << 20 : 0) |
(i & 2 ? 1 << 24 : 0) |
(i & 1 ? 1 << 28 : 0);
else
for (i = 0; i < 16; i++)
con_charconvtable[i] =
(i & 8 ? 1 << 0 : 0) |
(i & 4 ? 1 << 8 : 0) |
(i & 2 ? 1 << 16 : 0) |
(i & 1 ? 1 << 24 : 0);
palette_setpixel(0);
if (bytes_per_char_h == 1) {
palette_write (0);
palette_write (0x00ffffff);
for (i = 2; i < 256; i++)
palette_write (0);
white = 1;
} else {
for (i = 0; i < 256; i++)
palette_write (i < 16 ? palette_4[i] : 0);
white = 7;
}
if (nr_pages * page_size < 4096*1024) error("<4M of mem\n");
}
#endif
/*
* nothing to do
*/
#define arch_decomp_wdog()

10
arch/arm/mach-rpc/include/mach/vmalloc.h Normal file
View File

@@ -0,0 +1,10 @@
/*
* arch/arm/mach-rpc/include/mach/vmalloc.h
*
* Copyright (C) 1997 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)