[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach

This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
2008-08-05 16:14:15 +01:00
committed by Russell King
부모 a1b81a84ff
커밋 a09e64fbc0
1582개의 변경된 파일3001개의 추가작업 그리고 3020개의 파일을 삭제

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/* arch/arm/mach-ebsa110/include/mach/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
**/
.macro addruart,rx
mov \rx, #0xf0000000
orr \rx, \rx, #0x00000be0
.endm
#define UART_SHIFT 2
#define FLOW_CONTROL
#include <asm/hardware/debug-8250.S>

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/*
* arch/arm/mach-ebsa110/include/mach/dma.h
*
* Copyright (C) 1997,1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* EBSA110 DMA definitions
*/

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/*
* arch/arm/mach-ebsa110/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for ebsa110 platform.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define IRQ_STAT 0xff000000 /* read */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
mov \base, #IRQ_STAT
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, stat, base, tmp
ldrb \stat, [\base] @ get interrupts
mov \irqnr, #0
tst \stat, #15
addeq \irqnr, \irqnr, #4
moveq \stat, \stat, lsr #4
tst \stat, #3
addeq \irqnr, \irqnr, #2
moveq \stat, \stat, lsr #2
tst \stat, #1
addeq \irqnr, \irqnr, #1
moveq \stat, \stat, lsr #1
tst \stat, #1 @ bit 0 should be set
.endm

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/*
* arch/arm/mach-ebsa110/include/mach/hardware.h
*
* Copyright (C) 1996-2000 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This file contains the hardware definitions of the EBSA-110.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
/*
* The EBSA110 has a weird "ISA IO" region:
*
* Region 0 (addr = 0xf0000000 + io << 2)
* --------------------------------------------------------
* Physical region IO region
* f0000fe0 - f0000ffc 3f8 - 3ff ttyS0
* f0000e60 - f0000e64 398 - 399
* f0000de0 - f0000dfc 378 - 37f lp0
* f0000be0 - f0000bfc 2f8 - 2ff ttyS1
*
* Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
* --------------------------------------------------------
* Physical region IO region
* f00014f1 a79 pnp write data
* f00007c0 - f00007c1 3e0 - 3e1 pcmcia
* f00004f1 279 pnp address
* f0000440 - f000046c 220 - 236 eth0
* f0000405 203 pnp read data
*/
#define ISAMEM_PHYS 0xe0000000
#define ISAMEM_SIZE 0x10000000
#define ISAIO_PHYS 0xf0000000
#define ISAIO_SIZE PGDIR_SIZE
#define TRICK0_PHYS 0xf2000000
#define TRICK1_PHYS 0xf2400000
#define TRICK2_PHYS 0xf2800000
#define TRICK3_PHYS 0xf2c00000
#define TRICK4_PHYS 0xf3000000
#define TRICK5_PHYS 0xf3400000
#define TRICK6_PHYS 0xf3800000
#define TRICK7_PHYS 0xf3c00000
#define ISAMEM_BASE 0xe0000000
#define ISAIO_BASE 0xf0000000
#define PIT_BASE 0xfc000000
#define SOFT_BASE 0xfd000000
/*
* RAM definitions
*/
#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */
#endif

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/*
* arch/arm/mach-ebsa110/include/mach/io.h
*
* Copyright (C) 1997,1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 06-Dec-1997 RMK Created.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffff
u8 __inb8(unsigned int port);
void __outb8(u8 val, unsigned int port);
u8 __inb16(unsigned int port);
void __outb16(u8 val, unsigned int port);
u16 __inw(unsigned int port);
void __outw(u16 val, unsigned int port);
u32 __inl(unsigned int port);
void __outl(u32 val, unsigned int port);
u8 __readb(const volatile void __iomem *addr);
u16 __readw(const volatile void __iomem *addr);
u32 __readl(const volatile void __iomem *addr);
void __writeb(u8 val, void __iomem *addr);
void __writew(u16 val, void __iomem *addr);
void __writel(u32 val, void __iomem *addr);
/*
* Argh, someone forgot the IOCS16 line. We therefore have to handle
* the byte stearing by selecting the correct byte IO functions here.
*/
#ifdef ISA_SIXTEEN_BIT_PERIPHERAL
#define inb(p) __inb16(p)
#define outb(v,p) __outb16(v,p)
#else
#define inb(p) __inb8(p)
#define outb(v,p) __outb8(v,p)
#endif
#define inw(p) __inw(p)
#define outw(v,p) __outw(v,p)
#define inl(p) __inl(p)
#define outl(v,p) __outl(v,p)
#define readb(b) __readb(b)
#define readw(b) __readw(b)
#define readl(b) __readl(b)
#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
#define writeb(v,b) __writeb(v,b)
#define writew(v,b) __writew(v,b)
#define writel(v,b) __writel(v,b)
static inline void __iomem *__arch_ioremap(unsigned long cookie, size_t size,
unsigned int flags)
{
return (void __iomem *)cookie;
}
#define __arch_ioremap __arch_ioremap
#define __arch_iounmap(cookie) do { } while (0)
extern void insb(unsigned int port, void *buf, int sz);
extern void insw(unsigned int port, void *buf, int sz);
extern void insl(unsigned int port, void *buf, int sz);
extern void outsb(unsigned int port, const void *buf, int sz);
extern void outsw(unsigned int port, const void *buf, int sz);
extern void outsl(unsigned int port, const void *buf, int sz);
/* can't support writesb atm */
extern void writesw(void __iomem *addr, const void *data, int wordlen);
extern void writesl(void __iomem *addr, const void *data, int longlen);
/* can't support readsb atm */
extern void readsw(const void __iomem *addr, void *data, int wordlen);
extern void readsl(const void __iomem *addr, void *data, int longlen);
#endif

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/*
* arch/arm/mach-ebsa110/include/mach/irqs.h
*
* Copyright (C) 1996 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define NR_IRQS 8
#define IRQ_EBSA110_PRINTER 0
#define IRQ_EBSA110_COM1 1
#define IRQ_EBSA110_COM2 2
#define IRQ_EBSA110_ETHERNET 3
#define IRQ_EBSA110_TIMER0 4
#define IRQ_EBSA110_TIMER1 5
#define IRQ_EBSA110_PCMCIA 6
#define IRQ_EBSA110_IMMEDIATE 7

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/*
* arch/arm/mach-ebsa110/include/mach/memory.h
*
* Copyright (C) 1996-1999 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 20-Oct-1996 RMK Created
* 31-Dec-1997 RMK Fixed definitions to reduce warnings
* 21-Mar-1999 RMK Renamed to memory.h
* RMK Moved TASK_SIZE and PAGE_OFFSET here
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
/*
* We keep this 1:1 so that we don't interfere
* with the PCMCIA memory regions
*/
#define __virt_to_bus(x) (x)
#define __bus_to_virt(x) (x)
/*
* Cache flushing area - SRAM
*/
#define FLUSH_BASE_PHYS 0x40000000
#define FLUSH_BASE 0xdf000000
#endif

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/*
* arch/arm/mach-ebsa110/include/mach/system.h
*
* Copyright (C) 1996-2000 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
/*
* EBSA110 idling methodology:
*
* We can not execute the "wait for interrupt" instruction since that
* will stop our MCLK signal (which provides the clock for the glue
* logic, and therefore the timer interrupt).
*
* Instead, we spin, polling the IRQ_STAT register for the occurrence
* of any interrupt with core clock down to the memory clock.
*/
static inline void arch_idle(void)
{
const char *irq_stat = (char *)0xff000000;
/* disable clock switching */
asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
/* wait for an interrupt to occur */
while (!*irq_stat);
/* enable clock switching */
asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
}
#define arch_reset(mode) cpu_reset(0x80000000)
#endif

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/*
* arch/arm/mach-ebsa110/include/mach/timex.h
*
* Copyright (C) 1997, 1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* EBSA110 architecture timex specifications
*/
/*
* On the EBSA, the clock ticks at weird rates.
* This is therefore not used to calculate the
* divisor.
*/
#define CLOCK_TICK_RATE 47894000

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/*
* arch/arm/mach-ebsa110/include/mach/uncompress.h
*
* Copyright (C) 1996,1997,1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/serial_reg.h>
#define SERIAL_BASE ((unsigned char *)0xf0000be0)
/*
* This does not append a newline
*/
static inline void putc(int c)
{
unsigned char v, *base = SERIAL_BASE;
do {
v = base[UART_LSR << 2];
barrier();
} while (!(v & UART_LSR_THRE));
base[UART_TX << 2] = c;
}
static inline void flush(void)
{
unsigned char v, *base = SERIAL_BASE;
do {
v = base[UART_LSR << 2];
barrier();
} while ((v & (UART_LSR_TEMT|UART_LSR_THRE)) !=
(UART_LSR_TEMT|UART_LSR_THRE));
}
/*
* nothing to do
*/
#define arch_decomp_setup()
#define arch_decomp_wdog()

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/*
* arch/arm/mach-ebsa110/include/mach/vmalloc.h
*
* Copyright (C) 1998 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define VMALLOC_END (PAGE_OFFSET + 0x1f000000)