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drm/radeon: factor out cs_next_is_pkt3_nop function

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Once we factored out radeon_cs_packet_parse function,
evergreen_cs_next_is_pkt3_nop and r600_cs_next_is_pkt3_nop
functions became identical, so they can be factored out
into a common function.

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ilija Hadzic
2013-01-02 18:27:42 -05:00
committed by Alex Deucher
parent c38f34b53e
commit 9ffb7a6dca
5 changed files with 30 additions and 48 deletions
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23
drivers/gpu/drm/radeon/evergreen_cs.c
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@@ -1054,27 +1054,6 @@ static int evergreen_cs_packet_next_reloc(struct radeon_cs_parser *p,
return 0;
}
/**
* evergreen_cs_packet_next_is_pkt3_nop() - test if the next packet is NOP
* @p: structure holding the parser context.
*
* Check if the next packet is a relocation packet3.
**/
static bool evergreen_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p)
{
struct radeon_cs_packet p3reloc;
int r;
r = radeon_cs_packet_parse(p, &p3reloc, p->idx);
if (r) {
return false;
}
if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) {
return false;
}
return true;
}
/**
* evergreen_cs_packet_next_vline() - parse userspace VLINE packet
* @parser: parser structure holding parsing context.
@@ -2464,7 +2443,7 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p,
if ((tex_dim == SQ_TEX_DIM_2D_MSAA || tex_dim == SQ_TEX_DIM_2D_ARRAY_MSAA) &&
!mip_address &&
!evergreen_cs_packet_next_is_pkt3_nop(p)) {
!radeon_cs_packet_next_is_pkt3_nop(p)) {
/* MIP_ADDRESS should point to FMASK for an MSAA texture.
* It should be 0 if FMASK is disabled. */
moffset = 0;