gpio: samsung: Remove OF support for s3c24xx
There is no users of this code and there is already a pinctrl
driver written for s3c24xx which is going to be used on any
s3c24xx DT platforms. Hence this has been effectively a dead
code in mainline.
This reverts commit 172c6a1365
gpio: samsung: add devicetree init for s3c24xx arches
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:

committed by
Kukjin Kim

parent
f722406faa
commit
9fdb27d48a
@@ -933,67 +933,6 @@ static void __init samsung_gpiolib_add(struct samsung_gpio_chip *chip)
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s3c_gpiolib_track(chip);
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}
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#if defined(CONFIG_PLAT_S3C24XX) && defined(CONFIG_OF)
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static int s3c24xx_gpio_xlate(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec, u32 *flags)
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{
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unsigned int pin;
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if (WARN_ON(gc->of_gpio_n_cells < 3))
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return -EINVAL;
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if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells))
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return -EINVAL;
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if (gpiospec->args[0] > gc->ngpio)
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return -EINVAL;
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pin = gc->base + gpiospec->args[0];
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if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(gpiospec->args[1])))
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pr_warn("gpio_xlate: failed to set pin function\n");
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if (s3c_gpio_setpull(pin, gpiospec->args[2] & 0xffff))
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pr_warn("gpio_xlate: failed to set pin pull up/down\n");
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if (flags)
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*flags = gpiospec->args[2] >> 16;
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return gpiospec->args[0];
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}
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static const struct of_device_id s3c24xx_gpio_dt_match[] __initdata = {
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{ .compatible = "samsung,s3c24xx-gpio", },
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{}
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};
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static __init void s3c24xx_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
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u64 base, u64 offset)
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{
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struct gpio_chip *gc = &chip->chip;
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u64 address;
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if (!of_have_populated_dt())
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return;
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address = chip->base ? base + ((u32)chip->base & 0xfff) : base + offset;
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gc->of_node = of_find_matching_node_by_address(NULL,
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s3c24xx_gpio_dt_match, address);
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if (!gc->of_node) {
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pr_info("gpio: device tree node not found for gpio controller"
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" with base address %08llx\n", address);
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return;
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}
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gc->of_gpio_n_cells = 3;
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gc->of_xlate = s3c24xx_gpio_xlate;
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}
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#else
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static __init void s3c24xx_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
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u64 base, u64 offset)
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{
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return;
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}
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#endif /* defined(CONFIG_PLAT_S3C24XX) && defined(CONFIG_OF) */
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static void __init s3c24xx_gpiolib_add_chips(struct samsung_gpio_chip *chip,
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int nr_chips, void __iomem *base)
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{
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@@ -1018,8 +957,6 @@ static void __init s3c24xx_gpiolib_add_chips(struct samsung_gpio_chip *chip,
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gc->direction_output = samsung_gpiolib_2bit_output;
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samsung_gpiolib_add(chip);
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s3c24xx_gpiolib_attach_ofnode(chip, S3C24XX_PA_GPIO, i * 0x10);
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}
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}
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