ARM: 8711/1: V7M: Add support for MPU to M-class
This patch makes it possible to use MPU with v7M cores. Tested-by: Szemző András <sza@esh.hu> Tested-by: Alexandre TORGUE <alexandre.torgue@st.com> Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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Russell King

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@@ -57,6 +57,16 @@
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#define V7M_SCB_CCSIDR 0x80 /* Cache size ID register */
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#define V7M_SCB_CSSELR 0x84 /* Cache size selection register */
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/* Memory-mapped MPU registers for M-class */
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#define MPU_TYPE 0x90
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#define MPU_CTRL 0x94
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#define MPU_CTRL_ENABLE 1
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#define MPU_CTRL_PRIVDEFENA (1 << 2)
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#define MPU_RNR 0x98
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#define MPU_RBAR 0x9c
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#define MPU_RASR 0xa0
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/* Cache opeartions */
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#define V7M_SCB_ICIALLU 0x250 /* I-cache invalidate all to PoU */
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#define V7M_SCB_ICIMVAU 0x258 /* I-cache invalidate by MVA to PoU */
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