Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Overlapping header include additions in macsec.c A bug fix in 'net' overlapping with the removal of 'version' string in ena_netdev.c Overlapping test additions in selftests Makefile Overlapping PCI ID table adjustments in iwlwifi driver. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
@@ -6860,12 +6860,12 @@ skip_rdma:
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}
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ena |= FUNC_BACKING_STORE_CFG_REQ_DFLT_ENABLES;
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rc = bnxt_hwrm_func_backing_store_cfg(bp, ena);
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if (rc)
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if (rc) {
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netdev_err(bp->dev, "Failed configuring context mem, rc = %d.\n",
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rc);
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else
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ctx->flags |= BNXT_CTX_FLAG_INITED;
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return rc;
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}
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ctx->flags |= BNXT_CTX_FLAG_INITED;
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return 0;
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}
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@@ -7384,14 +7384,22 @@ static int bnxt_hwrm_port_qstats_ext(struct bnxt *bp)
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pri2cos = &resp2->pri0_cos_queue_id;
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for (i = 0; i < 8; i++) {
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u8 queue_id = pri2cos[i];
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u8 queue_idx;
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/* Per port queue IDs start from 0, 10, 20, etc */
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queue_idx = queue_id % 10;
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if (queue_idx > BNXT_MAX_QUEUE) {
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bp->pri2cos_valid = false;
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goto qstats_done;
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}
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for (j = 0; j < bp->max_q; j++) {
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if (bp->q_ids[j] == queue_id)
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bp->pri2cos[i] = j;
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bp->pri2cos_idx[i] = queue_idx;
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}
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}
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bp->pri2cos_valid = 1;
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}
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qstats_done:
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mutex_unlock(&bp->hwrm_cmd_lock);
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return rc;
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}
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@@ -11644,6 +11652,10 @@ static int bnxt_set_dflt_rings(struct bnxt *bp, bool sh)
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bp->rx_nr_rings++;
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bp->cp_nr_rings++;
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}
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if (rc) {
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bp->tx_nr_rings = 0;
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bp->rx_nr_rings = 0;
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}
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return rc;
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}
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@@ -11929,12 +11941,12 @@ init_err_pci_clean:
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bnxt_hwrm_func_drv_unrgtr(bp);
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bnxt_free_hwrm_short_cmd_req(bp);
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bnxt_free_hwrm_resources(bp);
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bnxt_free_ctx_mem(bp);
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kfree(bp->ctx);
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bp->ctx = NULL;
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kfree(bp->fw_health);
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bp->fw_health = NULL;
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bnxt_cleanup_pci(bp);
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bnxt_free_ctx_mem(bp);
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kfree(bp->ctx);
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bp->ctx = NULL;
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init_err_free:
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free_netdev(dev);
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@@ -1718,7 +1718,7 @@ struct bnxt {
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u16 fw_rx_stats_ext_size;
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u16 fw_tx_stats_ext_size;
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u16 hw_ring_stats_size;
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u8 pri2cos[8];
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u8 pri2cos_idx[8];
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u8 pri2cos_valid;
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u16 hwrm_max_req_len;
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@@ -472,24 +472,26 @@ static int bnxt_dcbnl_ieee_getets(struct net_device *dev, struct ieee_ets *ets)
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{
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struct bnxt *bp = netdev_priv(dev);
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struct ieee_ets *my_ets = bp->ieee_ets;
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int rc;
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ets->ets_cap = bp->max_tc;
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if (!my_ets) {
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int rc;
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if (bp->dcbx_cap & DCB_CAP_DCBX_HOST)
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return 0;
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my_ets = kzalloc(sizeof(*my_ets), GFP_KERNEL);
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if (!my_ets)
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return 0;
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return -ENOMEM;
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rc = bnxt_hwrm_queue_cos2bw_qcfg(bp, my_ets);
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if (rc)
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return 0;
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goto error;
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rc = bnxt_hwrm_queue_pri2cos_qcfg(bp, my_ets);
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if (rc)
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return 0;
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goto error;
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/* cache result */
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bp->ieee_ets = my_ets;
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}
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ets->cbs = my_ets->cbs;
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@@ -498,6 +500,9 @@ static int bnxt_dcbnl_ieee_getets(struct net_device *dev, struct ieee_ets *ets)
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memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
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memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
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return 0;
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error:
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kfree(my_ets);
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return rc;
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}
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static int bnxt_dcbnl_ieee_setets(struct net_device *dev, struct ieee_ets *ets)
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@@ -589,25 +589,25 @@ skip_ring_stats:
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if (bp->pri2cos_valid) {
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for (i = 0; i < 8; i++, j++) {
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long n = bnxt_rx_bytes_pri_arr[i].base_off +
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bp->pri2cos[i];
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bp->pri2cos_idx[i];
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buf[j] = le64_to_cpu(*(rx_port_stats_ext + n));
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}
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for (i = 0; i < 8; i++, j++) {
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long n = bnxt_rx_pkts_pri_arr[i].base_off +
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bp->pri2cos[i];
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bp->pri2cos_idx[i];
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buf[j] = le64_to_cpu(*(rx_port_stats_ext + n));
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}
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for (i = 0; i < 8; i++, j++) {
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long n = bnxt_tx_bytes_pri_arr[i].base_off +
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bp->pri2cos[i];
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bp->pri2cos_idx[i];
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buf[j] = le64_to_cpu(*(tx_port_stats_ext + n));
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}
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for (i = 0; i < 8; i++, j++) {
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long n = bnxt_tx_pkts_pri_arr[i].base_off +
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bp->pri2cos[i];
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bp->pri2cos_idx[i];
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buf[j] = le64_to_cpu(*(tx_port_stats_ext + n));
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}
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@@ -95,12 +95,6 @@ static inline void dmadesc_set_length_status(struct bcmgenet_priv *priv,
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bcmgenet_writel(value, d + DMA_DESC_LENGTH_STATUS);
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}
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static inline u32 dmadesc_get_length_status(struct bcmgenet_priv *priv,
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void __iomem *d)
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{
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return bcmgenet_readl(d + DMA_DESC_LENGTH_STATUS);
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}
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static inline void dmadesc_set_addr(struct bcmgenet_priv *priv,
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void __iomem *d,
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dma_addr_t addr)
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@@ -509,61 +503,6 @@ static int bcmgenet_set_link_ksettings(struct net_device *dev,
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return phy_ethtool_ksettings_set(dev->phydev, cmd);
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}
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static void bcmgenet_set_rx_csum(struct net_device *dev,
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netdev_features_t wanted)
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{
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struct bcmgenet_priv *priv = netdev_priv(dev);
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u32 rbuf_chk_ctrl;
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bool rx_csum_en;
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rx_csum_en = !!(wanted & NETIF_F_RXCSUM);
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rbuf_chk_ctrl = bcmgenet_rbuf_readl(priv, RBUF_CHK_CTRL);
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/* enable rx checksumming */
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if (rx_csum_en)
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rbuf_chk_ctrl |= RBUF_RXCHK_EN | RBUF_L3_PARSE_DIS;
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else
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rbuf_chk_ctrl &= ~RBUF_RXCHK_EN;
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priv->desc_rxchk_en = rx_csum_en;
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/* If UniMAC forwards CRC, we need to skip over it to get
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* a valid CHK bit to be set in the per-packet status word
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*/
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if (rx_csum_en && priv->crc_fwd_en)
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rbuf_chk_ctrl |= RBUF_SKIP_FCS;
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else
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rbuf_chk_ctrl &= ~RBUF_SKIP_FCS;
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bcmgenet_rbuf_writel(priv, rbuf_chk_ctrl, RBUF_CHK_CTRL);
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}
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static void bcmgenet_set_tx_csum(struct net_device *dev,
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netdev_features_t wanted)
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{
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struct bcmgenet_priv *priv = netdev_priv(dev);
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bool desc_64b_en;
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u32 tbuf_ctrl, rbuf_ctrl;
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tbuf_ctrl = bcmgenet_tbuf_ctrl_get(priv);
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rbuf_ctrl = bcmgenet_rbuf_readl(priv, RBUF_CTRL);
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desc_64b_en = !!(wanted & NETIF_F_HW_CSUM);
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/* enable 64 bytes descriptor in both directions (RBUF and TBUF) */
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if (desc_64b_en) {
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tbuf_ctrl |= RBUF_64B_EN;
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rbuf_ctrl |= RBUF_64B_EN;
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} else {
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tbuf_ctrl &= ~RBUF_64B_EN;
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rbuf_ctrl &= ~RBUF_64B_EN;
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}
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priv->desc_64b_en = desc_64b_en;
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bcmgenet_tbuf_ctrl_set(priv, tbuf_ctrl);
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bcmgenet_rbuf_writel(priv, rbuf_ctrl, RBUF_CTRL);
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}
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static int bcmgenet_set_features(struct net_device *dev,
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netdev_features_t features)
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{
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@@ -579,9 +518,6 @@ static int bcmgenet_set_features(struct net_device *dev,
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reg = bcmgenet_umac_readl(priv, UMAC_CMD);
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priv->crc_fwd_en = !!(reg & CMD_CRC_FWD);
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bcmgenet_set_tx_csum(dev, features);
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bcmgenet_set_rx_csum(dev, features);
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clk_disable_unprepare(priv->clk);
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return ret;
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@@ -1474,8 +1410,8 @@ static void bcmgenet_tx_reclaim_all(struct net_device *dev)
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/* Reallocate the SKB to put enough headroom in front of it and insert
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* the transmit checksum offsets in the descriptors
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*/
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static struct sk_buff *bcmgenet_put_tx_csum(struct net_device *dev,
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struct sk_buff *skb)
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static struct sk_buff *bcmgenet_add_tsb(struct net_device *dev,
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struct sk_buff *skb)
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{
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struct bcmgenet_priv *priv = netdev_priv(dev);
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struct status_64 *status = NULL;
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@@ -1589,13 +1525,11 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev)
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*/
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GENET_CB(skb)->bytes_sent = skb->len;
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/* set the SKB transmit checksum */
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if (priv->desc_64b_en) {
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skb = bcmgenet_put_tx_csum(dev, skb);
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if (!skb) {
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ret = NETDEV_TX_OK;
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goto out;
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}
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/* add the Transmit Status Block */
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skb = bcmgenet_add_tsb(dev, skb);
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if (!skb) {
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ret = NETDEV_TX_OK;
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goto out;
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}
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for (i = 0; i <= nr_frags; i++) {
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@@ -1774,6 +1708,9 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,
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while ((rxpktprocessed < rxpkttoprocess) &&
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(rxpktprocessed < budget)) {
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struct status_64 *status;
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__be16 rx_csum;
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cb = &priv->rx_cbs[ring->read_ptr];
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skb = bcmgenet_rx_refill(priv, cb);
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@@ -1782,20 +1719,12 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,
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goto next;
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}
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if (!priv->desc_64b_en) {
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dma_length_status =
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dmadesc_get_length_status(priv, cb->bd_addr);
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} else {
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struct status_64 *status;
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__be16 rx_csum;
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status = (struct status_64 *)skb->data;
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dma_length_status = status->length_status;
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status = (struct status_64 *)skb->data;
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dma_length_status = status->length_status;
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if (dev->features & NETIF_F_RXCSUM) {
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rx_csum = (__force __be16)(status->rx_csum & 0xffff);
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if (priv->desc_rxchk_en) {
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skb->csum = (__force __wsum)ntohs(rx_csum);
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skb->ip_summed = CHECKSUM_COMPLETE;
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}
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skb->csum = (__force __wsum)ntohs(rx_csum);
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skb->ip_summed = CHECKSUM_COMPLETE;
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}
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|
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/* DMA flags and length are still valid no matter how
|
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@@ -1839,14 +1768,10 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,
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} /* error packet */
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skb_put(skb, len);
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if (priv->desc_64b_en) {
|
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skb_pull(skb, 64);
|
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len -= 64;
|
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}
|
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|
||||
/* remove hardware 2bytes added for IP alignment */
|
||||
skb_pull(skb, 2);
|
||||
len -= 2;
|
||||
/* remove RSB and hardware 2bytes added for IP alignment */
|
||||
skb_pull(skb, 66);
|
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len -= 66;
|
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|
||||
if (priv->crc_fwd_en) {
|
||||
skb_trim(skb, len - ETH_FCS_LEN);
|
||||
@@ -1964,6 +1889,8 @@ static void umac_enable_set(struct bcmgenet_priv *priv, u32 mask, bool enable)
|
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u32 reg;
|
||||
|
||||
reg = bcmgenet_umac_readl(priv, UMAC_CMD);
|
||||
if (reg & CMD_SW_RESET)
|
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return;
|
||||
if (enable)
|
||||
reg |= mask;
|
||||
else
|
||||
@@ -1983,11 +1910,9 @@ static void reset_umac(struct bcmgenet_priv *priv)
|
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bcmgenet_rbuf_ctrl_set(priv, 0);
|
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udelay(10);
|
||||
|
||||
/* disable MAC while updating its registers */
|
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bcmgenet_umac_writel(priv, 0, UMAC_CMD);
|
||||
|
||||
/* issue soft reset with (rg)mii loopback to ensure a stable rxclk */
|
||||
bcmgenet_umac_writel(priv, CMD_SW_RESET | CMD_LCL_LOOP_EN, UMAC_CMD);
|
||||
/* issue soft reset and disable MAC while updating its registers */
|
||||
bcmgenet_umac_writel(priv, CMD_SW_RESET, UMAC_CMD);
|
||||
udelay(2);
|
||||
}
|
||||
|
||||
static void bcmgenet_intr_disable(struct bcmgenet_priv *priv)
|
||||
@@ -2037,11 +1962,28 @@ static void init_umac(struct bcmgenet_priv *priv)
|
||||
|
||||
bcmgenet_umac_writel(priv, ENET_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
|
||||
|
||||
/* init rx registers, enable ip header optimization */
|
||||
/* init tx registers, enable TSB */
|
||||
reg = bcmgenet_tbuf_ctrl_get(priv);
|
||||
reg |= TBUF_64B_EN;
|
||||
bcmgenet_tbuf_ctrl_set(priv, reg);
|
||||
|
||||
/* init rx registers, enable ip header optimization and RSB */
|
||||
reg = bcmgenet_rbuf_readl(priv, RBUF_CTRL);
|
||||
reg |= RBUF_ALIGN_2B;
|
||||
reg |= RBUF_ALIGN_2B | RBUF_64B_EN;
|
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bcmgenet_rbuf_writel(priv, reg, RBUF_CTRL);
|
||||
|
||||
/* enable rx checksumming */
|
||||
reg = bcmgenet_rbuf_readl(priv, RBUF_CHK_CTRL);
|
||||
reg |= RBUF_RXCHK_EN | RBUF_L3_PARSE_DIS;
|
||||
/* If UniMAC forwards CRC, we need to skip over it to get
|
||||
* a valid CHK bit to be set in the per-packet status word
|
||||
*/
|
||||
if (priv->crc_fwd_en)
|
||||
reg |= RBUF_SKIP_FCS;
|
||||
else
|
||||
reg &= ~RBUF_SKIP_FCS;
|
||||
bcmgenet_rbuf_writel(priv, reg, RBUF_CHK_CTRL);
|
||||
|
||||
if (!GENET_IS_V1(priv) && !GENET_IS_V2(priv))
|
||||
bcmgenet_rbuf_writel(priv, 1, RBUF_TBUF_SIZE_CTRL);
|
||||
|
||||
|
@@ -273,6 +273,7 @@ struct bcmgenet_mib_counters {
|
||||
#define RBUF_FLTR_LEN_SHIFT 8
|
||||
|
||||
#define TBUF_CTRL 0x00
|
||||
#define TBUF_64B_EN (1 << 0)
|
||||
#define TBUF_BP_MC 0x0C
|
||||
#define TBUF_ENERGY_CTRL 0x14
|
||||
#define TBUF_EEE_EN (1 << 0)
|
||||
@@ -662,8 +663,6 @@ struct bcmgenet_priv {
|
||||
unsigned int irq0_stat;
|
||||
|
||||
/* HW descriptors/checksum variables */
|
||||
bool desc_64b_en;
|
||||
bool desc_rxchk_en;
|
||||
bool crc_fwd_en;
|
||||
|
||||
u32 dma_max_burst_length;
|
||||
|
@@ -132,8 +132,12 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* disable RX */
|
||||
/* Can't suspend with WoL if MAC is still in reset */
|
||||
reg = bcmgenet_umac_readl(priv, UMAC_CMD);
|
||||
if (reg & CMD_SW_RESET)
|
||||
reg &= ~CMD_SW_RESET;
|
||||
|
||||
/* disable RX */
|
||||
reg &= ~CMD_RX_EN;
|
||||
bcmgenet_umac_writel(priv, reg, UMAC_CMD);
|
||||
mdelay(10);
|
||||
|
@@ -95,6 +95,12 @@ void bcmgenet_mii_setup(struct net_device *dev)
|
||||
CMD_HD_EN |
|
||||
CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE);
|
||||
reg |= cmd_bits;
|
||||
if (reg & CMD_SW_RESET) {
|
||||
reg &= ~CMD_SW_RESET;
|
||||
bcmgenet_umac_writel(priv, reg, UMAC_CMD);
|
||||
udelay(2);
|
||||
reg |= CMD_TX_EN | CMD_RX_EN;
|
||||
}
|
||||
bcmgenet_umac_writel(priv, reg, UMAC_CMD);
|
||||
} else {
|
||||
/* done if nothing has changed */
|
||||
@@ -181,38 +187,8 @@ int bcmgenet_mii_config(struct net_device *dev, bool init)
|
||||
const char *phy_name = NULL;
|
||||
u32 id_mode_dis = 0;
|
||||
u32 port_ctrl;
|
||||
int bmcr = -1;
|
||||
int ret;
|
||||
u32 reg;
|
||||
|
||||
/* MAC clocking workaround during reset of umac state machines */
|
||||
reg = bcmgenet_umac_readl(priv, UMAC_CMD);
|
||||
if (reg & CMD_SW_RESET) {
|
||||
/* An MII PHY must be isolated to prevent TXC contention */
|
||||
if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
|
||||
ret = phy_read(phydev, MII_BMCR);
|
||||
if (ret >= 0) {
|
||||
bmcr = ret;
|
||||
ret = phy_write(phydev, MII_BMCR,
|
||||
bmcr | BMCR_ISOLATE);
|
||||
}
|
||||
if (ret) {
|
||||
netdev_err(dev, "failed to isolate PHY\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
/* Switch MAC clocking to RGMII generated clock */
|
||||
bcmgenet_sys_writel(priv, PORT_MODE_EXT_GPHY, SYS_PORT_CTRL);
|
||||
/* Ensure 5 clks with Rx disabled
|
||||
* followed by 5 clks with Reset asserted
|
||||
*/
|
||||
udelay(4);
|
||||
reg &= ~(CMD_SW_RESET | CMD_LCL_LOOP_EN);
|
||||
bcmgenet_umac_writel(priv, reg, UMAC_CMD);
|
||||
/* Ensure 5 more clocks before Rx is enabled */
|
||||
udelay(2);
|
||||
}
|
||||
|
||||
switch (priv->phy_interface) {
|
||||
case PHY_INTERFACE_MODE_INTERNAL:
|
||||
phy_name = "internal PHY";
|
||||
@@ -282,10 +258,6 @@ int bcmgenet_mii_config(struct net_device *dev, bool init)
|
||||
|
||||
bcmgenet_sys_writel(priv, port_ctrl, SYS_PORT_CTRL);
|
||||
|
||||
/* Restore the MII PHY after isolation */
|
||||
if (bmcr >= 0)
|
||||
phy_write(phydev, MII_BMCR, bmcr);
|
||||
|
||||
priv->ext_phy = !priv->internal_phy &&
|
||||
(priv->phy_interface != PHY_INTERFACE_MODE_MOCA);
|
||||
|
||||
|
Reference in New Issue
Block a user