Merge 3.8-rc5 into tty-next
This resolves a number of tty driver merge issues found in linux-next Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
@@ -440,6 +440,8 @@ static int pty_bsd_ioctl(struct tty_struct *tty,
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return pty_get_pktmode(tty, (int __user *)arg);
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case TIOCSIG: /* Send signal to other side of pty */
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return pty_signal(tty, (int) arg);
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case TIOCGPTN: /* TTY returns ENOTTY, but glibc expects EINVAL here */
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return -EINVAL;
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}
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return -ENOIOCTLCMD;
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}
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@@ -293,6 +293,12 @@ static const struct serial8250_config uart_config[] = {
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UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
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.flags = UART_CAP_FIFO,
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},
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[PORT_BRCM_TRUMANAGE] = {
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.name = "TruManage",
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.fifo_size = 1,
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.tx_loadsz = 1024,
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.flags = UART_CAP_HFIFO,
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},
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[PORT_8250_CIR] = {
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.name = "CIR port"
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}
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@@ -1423,6 +1429,11 @@ void serial8250_tx_chars(struct uart_8250_port *up)
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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if (up->capabilities & UART_CAP_HFIFO) {
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if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
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BOTH_EMPTY)
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break;
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}
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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@@ -69,6 +69,7 @@ struct serial8250_config {
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#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
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#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
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#define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
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#define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
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#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
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#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
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@@ -105,7 +105,7 @@ static int dw8250_handle_irq(struct uart_port *p)
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} else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
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/* Clear the USR and write the LCR again. */
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(void)p->serial_in(p, DW_UART_USR);
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p->serial_out(p, d->last_lcr, UART_LCR);
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p->serial_out(p, UART_LCR, d->last_lcr);
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return 1;
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}
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@@ -1332,6 +1332,18 @@ pci_omegapci_setup(struct serial_private *priv,
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return setup_port(priv, port, 2, idx * 8, 0);
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}
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static int
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pci_brcm_trumanage_setup(struct serial_private *priv,
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const struct pciserial_board *board,
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struct uart_8250_port *port, int idx)
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{
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int ret = pci_default_setup(priv, board, port, idx);
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port->port.type = PORT_BRCM_TRUMANAGE;
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port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE);
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return ret;
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}
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static int skip_tx_en_setup(struct serial_private *priv,
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const struct pciserial_board *board,
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struct uart_8250_port *port, int idx)
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@@ -1548,9 +1560,10 @@ pci_wch_ch353_setup(struct serial_private *priv,
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#define PCI_VENDOR_ID_AGESTAR 0x5372
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#define PCI_DEVICE_ID_AGESTAR_9375 0x6872
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#define PCI_VENDOR_ID_ASIX 0x9710
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#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0019
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#define PCI_DEVICE_ID_COMMTECH_4224PCIE 0x0020
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#define PCI_DEVICE_ID_COMMTECH_4228PCIE 0x0021
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#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022
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#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a
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/* Unknown vendors/cards - this should not be in linux/pci_ids.h */
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@@ -2210,6 +2223,17 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
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.subdevice = PCI_ANY_ID,
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.setup = pci_xr17v35x_setup,
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},
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/*
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* Broadcom TruManage (NetXtreme)
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*/
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{
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.vendor = PCI_VENDOR_ID_BROADCOM,
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.device = PCI_DEVICE_ID_BROADCOM_TRUMANAGE,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.setup = pci_brcm_trumanage_setup,
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},
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/*
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* Default "match everything" terminator entry
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*/
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@@ -2405,6 +2429,7 @@ enum pci_board_num_t {
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pbn_ce4100_1_115200,
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pbn_omegapci,
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pbn_NETMOS9900_2s_115200,
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pbn_brcm_trumanage,
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};
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/*
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@@ -2503,7 +2528,7 @@ static struct pciserial_board pci_boards[] = {
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[pbn_b0_8_1152000_200] = {
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.flags = FL_BASE0,
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.num_ports = 2,
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.num_ports = 8,
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.base_baud = 1152000,
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.uart_offset = 0x200,
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},
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@@ -3149,6 +3174,12 @@ static struct pciserial_board pci_boards[] = {
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.num_ports = 2,
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.base_baud = 115200,
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},
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[pbn_brcm_trumanage] = {
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.flags = FL_BASE0,
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.num_ports = 1,
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.reg_shift = 2,
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.base_baud = 115200,
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},
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};
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static const struct pci_device_id blacklist[] = {
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@@ -4779,6 +4810,13 @@ static struct pci_device_id serial_pci_tbl[] = {
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_omegapci },
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/*
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* Broadcom TruManage
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*/
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{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BROADCOM_TRUMANAGE,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_brcm_trumanage },
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/*
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* AgeStar as-prs2-009
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*/
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@@ -636,6 +636,7 @@ static void ifx_port_shutdown(struct tty_port *port)
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clear_bit(IFX_SPI_STATE_IO_AVAILABLE, &ifx_dev->flags);
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mrdy_set_low(ifx_dev);
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del_timer(&ifx_dev->spi_timer);
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clear_bit(IFX_SPI_STATE_TIMER_PENDING, &ifx_dev->flags);
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tasklet_kill(&ifx_dev->io_work_tasklet);
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}
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@@ -805,7 +806,8 @@ static void ifx_spi_io(unsigned long data)
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ifx_dev->spi_xfer.cs_change = 0;
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ifx_dev->spi_xfer.speed_hz = ifx_dev->spi_dev->max_speed_hz;
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/* ifx_dev->spi_xfer.speed_hz = 390625; */
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ifx_dev->spi_xfer.bits_per_word = spi_bpw;
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ifx_dev->spi_xfer.bits_per_word =
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ifx_dev->spi_dev->bits_per_word;
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ifx_dev->spi_xfer.tx_buf = ifx_dev->tx_buffer;
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ifx_dev->spi_xfer.rx_buf = ifx_dev->rx_buffer;
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@@ -253,7 +253,7 @@ static void mxs_auart_tx_chars(struct mxs_auart_port *s)
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struct circ_buf *xmit = &s->port.state->xmit;
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if (auart_dma_enabled(s)) {
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int i = 0;
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u32 i = 0;
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int size;
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void *buffer = s->tx_dma_buf;
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@@ -411,10 +411,12 @@ static void mxs_auart_set_mctrl(struct uart_port *u, unsigned mctrl)
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u32 ctrl = readl(u->membase + AUART_CTRL2);
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ctrl &= ~AUART_CTRL2_RTSEN;
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ctrl &= ~(AUART_CTRL2_RTSEN | AUART_CTRL2_RTS);
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if (mctrl & TIOCM_RTS) {
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if (tty_port_cts_enabled(&u->state->port))
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ctrl |= AUART_CTRL2_RTSEN;
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else
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ctrl |= AUART_CTRL2_RTS;
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}
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s->ctrl = mctrl;
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@@ -1004,7 +1004,6 @@ static void s3c24xx_serial_resetport(struct uart_port *port,
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ucon &= ucon_mask;
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wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
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wr_regl(port, S3C2410_ULCON, cfg->ulcon);
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/* reset both fifos */
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wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
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@@ -610,7 +610,15 @@ static int vt8500_serial_probe(struct platform_device *pdev)
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vt8500_port->uart.line = port;
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vt8500_port->uart.dev = &pdev->dev;
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vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
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vt8500_port->uart.uartclk = clk_get_rate(vt8500_port->clk);
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vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
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if (!IS_ERR(vt8500_port->clk)) {
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vt8500_port->uart.uartclk = clk_get_rate(vt8500_port->clk);
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} else {
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/* use the default of 24Mhz if not specified and warn */
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pr_warn("%s: serial clock source not specified\n", __func__);
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vt8500_port->uart.uartclk = 24000000;
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}
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snprintf(vt8500_port->name, sizeof(vt8500_port->name),
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"VT8500 UART%d", pdev->id);
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