mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well
Power button IRQ actually has a second level of interrupts to distinguish between UI and POWER buttons. Moreover, current implementation looks awkward in approach to handle second level IRQs by first level related IRQ chip. To address above issues, split power button IRQ to be chained as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Lee Jones

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@@ -25,6 +25,7 @@ struct intel_soc_pmic {
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int irq;
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struct regmap *regmap;
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struct regmap_irq_chip_data *irq_chip_data;
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struct regmap_irq_chip_data *irq_chip_data_pwrbtn;
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struct regmap_irq_chip_data *irq_chip_data_tmu;
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struct regmap_irq_chip_data *irq_chip_data_bcu;
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struct regmap_irq_chip_data *irq_chip_data_adc;
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