ath9k: INI update for atheros chipets.
init values update for various atheros chipsets. Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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committed by
John W. Linville

parent
ea4a82dcee
commit
9f80420217
@@ -415,6 +415,9 @@ struct ar5416Stats {
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#define AR5416_EEP_MINOR_VER_3 0x3
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#define AR5416_EEP_MINOR_VER_7 0x7
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#define AR5416_EEP_MINOR_VER_9 0x9
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#define AR5416_EEP_MINOR_VER_16 0x10
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#define AR5416_EEP_MINOR_VER_17 0x11
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#define AR5416_EEP_MINOR_VER_19 0x13
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#define AR5416_NUM_5G_CAL_PIERS 8
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#define AR5416_NUM_2G_CAL_PIERS 4
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@@ -436,6 +439,16 @@ struct ar5416Stats {
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#define AR5416_MAX_CHAINS 3
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#define AR5416_PWR_TABLE_OFFSET -5
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/* Rx gain type values */
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#define AR5416_EEP_RXGAIN_23DB_BACKOFF 0
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#define AR5416_EEP_RXGAIN_13DB_BACKOFF 1
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#define AR5416_EEP_RXGAIN_ORIG 2
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/* Tx gain type values */
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#define AR5416_EEP_TXGAIN_ORIGINAL 0
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#define AR5416_EEP_TXGAIN_HIGH_POWER 1
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enum eeprom_param {
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EEP_NFTHRESH_5,
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EEP_NFTHRESH_2,
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@@ -454,6 +467,8 @@ enum eeprom_param {
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EEP_MINOR_REV,
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EEP_TX_MASK,
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EEP_RX_MASK,
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EEP_RXGAIN_TYPE,
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EEP_TXGAIN_TYPE,
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};
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enum ar5416_rates {
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@@ -485,7 +500,11 @@ struct base_eep_header {
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u32 binBuildNumber;
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u8 deviceType;
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u8 pwdclkind;
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u8 futureBase[32];
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u8 futureBase_1[2];
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u8 rxGainType;
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u8 futureBase_2[3];
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u8 txGainType;
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u8 futureBase_3[25];
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} __packed;
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struct spur_chan {
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@@ -792,6 +811,8 @@ struct ath_hal_5416 {
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struct ar5416IniArray ah_iniAddac;
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struct ar5416IniArray ah_iniPcieSerdes;
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struct ar5416IniArray ah_iniModesAdditional;
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struct ar5416IniArray ah_iniModesRxGain;
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struct ar5416IniArray ah_iniModesTxGain;
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};
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#define AH5416(_ah) ((struct ath_hal_5416 *)(_ah))
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