drm/i915: save/restore GMBUS freq across suspend/resume on gen4
Should probably just init this in the GMbus code all the time, based on the cdclk and HPLL like we do on newer platforms. Ville has code for that in a rework branch, but until then we can fix this bug fairly easily. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76301 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Nikolay <mar.kolya@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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Jani Nikula

parent
26459343e0
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9f49c37635
@@ -303,6 +303,10 @@ int i915_save_state(struct drm_device *dev)
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}
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}
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if (IS_GEN4(dev))
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pci_read_config_word(dev->pdev, GCDGMBUS,
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&dev_priv->regfile.saveGCDGMBUS);
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/* Cache mode state */
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if (INTEL_INFO(dev)->gen < 7)
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dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
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@@ -331,6 +335,10 @@ int i915_restore_state(struct drm_device *dev)
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mutex_lock(&dev->struct_mutex);
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i915_gem_restore_fences(dev);
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if (IS_GEN4(dev))
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pci_write_config_word(dev->pdev, GCDGMBUS,
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dev_priv->regfile.saveGCDGMBUS);
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i915_restore_display(dev);
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if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
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