Merge tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa
Pull Xtensa updates from Max Filippov: - switch to generated syscall table - switch ptrace to regsets, use regsets for core dumps - complete tracehook implementation - add syscall tracepoints support - add jumplabels support - add memtest support - drop unused/duplicated code from entry.S, ptrace.c, coprocessor.S, elf.h and syscall.h - clean up warnings caused by WSR/RSR macros - clean up DTC warnings about SPI controller node names in xtfpga.dtsi - simplify coprocessor.S - get rid of explicit 'l32r' instruction usage in assembly * tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa: (25 commits) xtensa: implement jump_label support xtensa: implement syscall tracepoints xtensa: implement tracehook functions and enable HAVE_ARCH_TRACEHOOK xtensa: enable CORE_DUMP_USE_REGSET xtensa: implement TIE regset xtensa: implement task_user_regset_view xtensa: call do_syscall_trace_{enter,leave} selectively xtensa: use NO_SYSCALL instead of -1 xtensa: define syscall_get_arch() Move EM_XTENSA to uapi/linux/elf-em.h xtensa: support memtest xtensa: don't use l32r opcode directly xtensa: xtfpga.dtsi: fix dtc warnings about SPI xtensa: don't clear cpenable unconditionally on release xtensa: simplify coprocessor.S xtensa: clean up WSR*/RSR*/get_sr/set_sr xtensa: drop unused declarations from elf.h xtensa: clean up syscall.h xtensa: drop unused coprocessor helper functions xtensa: drop custom PTRACE_{PEEK,POKE}{TEXT,DATA} ...
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@@ -62,7 +62,7 @@ void secondary_init_irq(void)
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__this_cpu_write(cached_irq_mask,
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XCHAL_INTTYPE_MASK_EXTERN_EDGE |
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XCHAL_INTTYPE_MASK_EXTERN_LEVEL);
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set_sr(XCHAL_INTTYPE_MASK_EXTERN_EDGE |
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xtensa_set_sr(XCHAL_INTTYPE_MASK_EXTERN_EDGE |
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XCHAL_INTTYPE_MASK_EXTERN_LEVEL, intenable);
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}
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@@ -77,7 +77,7 @@ static void xtensa_mx_irq_mask(struct irq_data *d)
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} else {
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mask = __this_cpu_read(cached_irq_mask) & ~mask;
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__this_cpu_write(cached_irq_mask, mask);
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set_sr(mask, intenable);
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xtensa_set_sr(mask, intenable);
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}
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}
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@@ -92,7 +92,7 @@ static void xtensa_mx_irq_unmask(struct irq_data *d)
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} else {
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mask |= __this_cpu_read(cached_irq_mask);
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__this_cpu_write(cached_irq_mask, mask);
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set_sr(mask, intenable);
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xtensa_set_sr(mask, intenable);
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}
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}
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@@ -108,12 +108,12 @@ static void xtensa_mx_irq_disable(struct irq_data *d)
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static void xtensa_mx_irq_ack(struct irq_data *d)
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{
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set_sr(1 << d->hwirq, intclear);
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xtensa_set_sr(1 << d->hwirq, intclear);
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}
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static int xtensa_mx_irq_retrigger(struct irq_data *d)
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{
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set_sr(1 << d->hwirq, intset);
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xtensa_set_sr(1 << d->hwirq, intset);
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return 1;
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}
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@@ -44,13 +44,13 @@ static const struct irq_domain_ops xtensa_irq_domain_ops = {
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static void xtensa_irq_mask(struct irq_data *d)
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{
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cached_irq_mask &= ~(1 << d->hwirq);
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set_sr(cached_irq_mask, intenable);
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xtensa_set_sr(cached_irq_mask, intenable);
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}
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static void xtensa_irq_unmask(struct irq_data *d)
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{
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cached_irq_mask |= 1 << d->hwirq;
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set_sr(cached_irq_mask, intenable);
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xtensa_set_sr(cached_irq_mask, intenable);
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}
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static void xtensa_irq_enable(struct irq_data *d)
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@@ -65,12 +65,12 @@ static void xtensa_irq_disable(struct irq_data *d)
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static void xtensa_irq_ack(struct irq_data *d)
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{
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set_sr(1 << d->hwirq, intclear);
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xtensa_set_sr(1 << d->hwirq, intclear);
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}
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static int xtensa_irq_retrigger(struct irq_data *d)
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{
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set_sr(1 << d->hwirq, intset);
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xtensa_set_sr(1 << d->hwirq, intset);
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return 1;
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}
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