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OMAP: DSS2: DISPC: Fix minimum PCD value

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The current driver had a hardcoded minimum value of 2 for pixel clock
divisor (PCD). This doesn't seem to be right.

OMAP4 TRM says that PCD can be 1 when not downscaling, and inverted
pixel clock (IPC) is off.

OMAP3 TRM says the same, but also in the register descriptions that PCD
value 1 is invalid.

OMAP2 TRM says PCD 2 is the minimum.

OMAP2 is still untested, but for both OMAP3 and OMAP4 PCD of 1 seems to
work fine.

This patch adds a new DSS feature, FEAT_PARAM_DSS_PCD, which is used to
find the minimum and maximum PCD. The minimum is set to 2 for OMAP2, and
1 for OMAP3/4.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Tomi Valkeinen
2011-08-29 15:56:04 +03:00
parent d875f992e9
commit 9eaaf2076d
3 changed files with 14 additions and 4 deletions
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1
drivers/video/omap2/dss/dss_features.h
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@@ -77,6 +77,7 @@ enum dss_feat_reg_field {
enum dss_range_param {
FEAT_PARAM_DSS_FCK,
FEAT_PARAM_DSS_PCD,
FEAT_PARAM_DSIPLL_REGN,
FEAT_PARAM_DSIPLL_REGM,
FEAT_PARAM_DSIPLL_REGM_DISPC,