MIPS: Alchemy: devboard register abstraction
All Alchemy development boards have external CPLDs with a few registers in them. They all share an identical register layout with only a few minor differences (except the PB1000) in bit functions and base addresses. This patch - adds a primitive facility to initialize and use these external registers, - replaces all occurrences of bcsr->xxx accesses with calls to the new functions (the pb1200 cascade irq handling code is special). - collects BCSR register information scattered throughout the board headers in a central place. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
committed by
Ralf Baechle
Ralf Baechle
parent
ebc89718a4
commit
9bdcf336d0
@@ -26,55 +26,6 @@
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#ifndef __ASM_PB1100_H
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#define __ASM_PB1100_H
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#define PB1100_IDENT 0xAE000000
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#define BOARD_STATUS_REG 0xAE000004
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# define PB1100_ROM_SEL (1 << 15)
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# define PB1100_ROM_SIZ (1 << 14)
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# define PB1100_SWAP_BOOT (1 << 13)
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# define PB1100_FLASH_WP (1 << 12)
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# define PB1100_ROM_H_STS (1 << 11)
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# define PB1100_ROM_L_STS (1 << 10)
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# define PB1100_FLASH_H_STS (1 << 9)
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# define PB1100_FLASH_L_STS (1 << 8)
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# define PB1100_SRAM_SIZ (1 << 7)
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# define PB1100_TSC_BUSY (1 << 6)
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# define PB1100_PCMCIA_VS_MASK (3 << 4)
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# define PB1100_RS232_CD (1 << 3)
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# define PB1100_RS232_CTS (1 << 2)
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# define PB1100_RS232_DSR (1 << 1)
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# define PB1100_RS232_RI (1 << 0)
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#define PB1100_IRDA_RS232 0xAE00000C
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# define PB1100_IRDA_FULL (0 << 14) /* full power */
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# define PB1100_IRDA_SHUTDOWN (1 << 14)
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# define PB1100_IRDA_TT (2 << 14) /* 2/3 power */
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# define PB1100_IRDA_OT (3 << 14) /* 1/3 power */
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# define PB1100_IRDA_FIR (1 << 13)
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#define PCMCIA_BOARD_REG 0xAE000010
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# define PB1100_SD_WP1_RO (1 << 15) /* read only */
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# define PB1100_SD_WP0_RO (1 << 14) /* read only */
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# define PB1100_SD_PWR1 (1 << 11) /* applies power to SD1 */
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# define PB1100_SD_PWR0 (1 << 10) /* applies power to SD0 */
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# define PB1100_SEL_SD_CONN1 (1 << 9)
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# define PB1100_SEL_SD_CONN0 (1 << 8)
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# define PC_DEASSERT_RST (1 << 7)
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# define PC_DRV_EN (1 << 4)
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#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
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#define PB1100_RST_VDDI 0xAE00001C
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# define PB1100_SOFT_RESET (1 << 15) /* clear to reset the board */
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# define PB1100_VDDI_MASK 0x1F
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#define PB1100_LEDS 0xAE000018
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/*
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* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
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* 7:0 is the LED Display's decimal points.
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*/
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#define PB1100_HEX_LED 0xAE000018
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/* PCMCIA Pb1100 specific defines */
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#define PCMCIA_MAX_SOCK 0
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#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
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@@ -43,113 +43,8 @@
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* Refer to board documentation.
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*/
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#define AC97_PSC_BASE PSC1_BASE_ADDR
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#define I2S_PSC_BASE PSC1_BASE_ADDR
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#define I2S_PSC_BASE PSC1_BASE_ADDR
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#define BCSR_KSEG1_ADDR 0xAD800000
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typedef volatile struct
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{
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/*00*/ u16 whoami;
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u16 reserved0;
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/*04*/ u16 status;
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u16 reserved1;
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/*08*/ u16 switches;
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u16 reserved2;
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/*0C*/ u16 resets;
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u16 reserved3;
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/*10*/ u16 pcmcia;
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u16 reserved4;
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/*14*/ u16 board;
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u16 reserved5;
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/*18*/ u16 disk_leds;
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u16 reserved6;
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/*1C*/ u16 system;
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u16 reserved7;
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/*20*/ u16 intclr;
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u16 reserved8;
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/*24*/ u16 intset;
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u16 reserved9;
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/*28*/ u16 intclr_mask;
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u16 reserved10;
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/*2C*/ u16 intset_mask;
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u16 reserved11;
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/*30*/ u16 sig_status;
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u16 reserved12;
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/*34*/ u16 int_status;
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u16 reserved13;
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/*38*/ u16 reserved14;
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u16 reserved15;
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/*3C*/ u16 reserved16;
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u16 reserved17;
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} BCSR;
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static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
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/*
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* Register bit definitions for the BCSRs
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*/
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#define BCSR_WHOAMI_DCID 0x000F
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#define BCSR_WHOAMI_CPLD 0x00F0
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#define BCSR_WHOAMI_BOARD 0x0F00
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#define BCSR_STATUS_PCMCIA0VS 0x0003
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#define BCSR_STATUS_PCMCIA1VS 0x000C
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#define BCSR_STATUS_SWAPBOOT 0x0040
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#define BCSR_STATUS_FLASHBUSY 0x0100
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#define BCSR_STATUS_IDECBLID 0x0200
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#define BCSR_STATUS_SD0WP 0x0400
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#define BCSR_STATUS_SD1WP 0x0800
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#define BCSR_STATUS_U0RXD 0x1000
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#define BCSR_STATUS_U1RXD 0x2000
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#define BCSR_SWITCHES_OCTAL 0x00FF
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#define BCSR_SWITCHES_DIP_1 0x0080
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#define BCSR_SWITCHES_DIP_2 0x0040
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#define BCSR_SWITCHES_DIP_3 0x0020
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#define BCSR_SWITCHES_DIP_4 0x0010
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#define BCSR_SWITCHES_DIP_5 0x0008
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#define BCSR_SWITCHES_DIP_6 0x0004
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#define BCSR_SWITCHES_DIP_7 0x0002
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#define BCSR_SWITCHES_DIP_8 0x0001
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#define BCSR_SWITCHES_ROTARY 0x0F00
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#define BCSR_RESETS_ETH 0x0001
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#define BCSR_RESETS_CAMERA 0x0002
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#define BCSR_RESETS_DC 0x0004
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#define BCSR_RESETS_IDE 0x0008
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/* not resets but in the same register */
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#define BCSR_RESETS_WSCFSM 0x0800
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#define BCSR_RESETS_PCS0MUX 0x1000
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#define BCSR_RESETS_PCS1MUX 0x2000
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#define BCSR_RESETS_SPISEL 0x4000
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#define BCSR_RESETS_SD1MUX 0x8000
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#define BCSR_PCMCIA_PC0VPP 0x0003
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#define BCSR_PCMCIA_PC0VCC 0x000C
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#define BCSR_PCMCIA_PC0DRVEN 0x0010
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#define BCSR_PCMCIA_PC0RST 0x0080
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#define BCSR_PCMCIA_PC1VPP 0x0300
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#define BCSR_PCMCIA_PC1VCC 0x0C00
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#define BCSR_PCMCIA_PC1DRVEN 0x1000
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#define BCSR_PCMCIA_PC1RST 0x8000
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#define BCSR_BOARD_LCDVEE 0x0001
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#define BCSR_BOARD_LCDVDD 0x0002
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#define BCSR_BOARD_LCDBL 0x0004
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#define BCSR_BOARD_CAMSNAP 0x0010
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#define BCSR_BOARD_CAMPWR 0x0020
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#define BCSR_BOARD_SD0PWR 0x0040
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#define BCSR_BOARD_SD1PWR 0x0080
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#define BCSR_LEDS_DECIMALS 0x00FF
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#define BCSR_LEDS_LED0 0x0100
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#define BCSR_LEDS_LED1 0x0200
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#define BCSR_LEDS_LED2 0x0400
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#define BCSR_LEDS_LED3 0x0800
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#define BCSR_SYSTEM_VDDI 0x001F
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#define BCSR_SYSTEM_POWEROFF 0x4000
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@@ -251,7 +146,7 @@ enum external_pb1200_ints {
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#define BOARD_PC0_INT PB1200_PC0_INT
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#define BOARD_PC1_INT PB1200_PC1_INT
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#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1 << (8 + (2 * SOCKET)))
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#define BOARD_CARD_INSERTED(SOCKET) (bcsr_read(BCSR_SIGSTAT & (1 << (8 + (2 * SOCKET))))
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/* NAND chip select */
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#define NAND_CS 1
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@@ -26,19 +26,6 @@
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#ifndef __ASM_PB1500_H
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#define __ASM_PB1500_H
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#define IDENT_BOARD_REG 0xAE000000
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#define BOARD_STATUS_REG 0xAE000004
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#define PCI_BOARD_REG 0xAE000010
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#define PCMCIA_BOARD_REG 0xAE000010
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# define PC_DEASSERT_RST 0x80
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# define PC_DRV_EN 0x10
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#define PB1500_G_CONTROL 0xAE000014
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#define PB1500_RST_VDDI 0xAE00001C
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#define PB1500_LEDS 0xAE000018
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#define PB1500_HEX_LED 0xAF000004
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#define PB1500_HEX_LED_BLANK 0xAF000008
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/* PCMCIA Pb1500 specific defines */
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#define PCMCIA_MAX_SOCK 0
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#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
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@@ -40,95 +40,6 @@
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#define SMBUS_PSC_BASE PSC2_BASE_ADDR
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#define I2S_PSC_BASE PSC3_BASE_ADDR
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#define BCSR_PHYS_ADDR 0xAF000000
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typedef volatile struct
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{
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/*00*/ u16 whoami;
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u16 reserved0;
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/*04*/ u16 status;
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u16 reserved1;
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/*08*/ u16 switches;
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u16 reserved2;
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/*0C*/ u16 resets;
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u16 reserved3;
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/*10*/ u16 pcmcia;
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u16 reserved4;
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/*14*/ u16 pci;
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u16 reserved5;
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/*18*/ u16 leds;
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u16 reserved6;
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/*1C*/ u16 system;
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u16 reserved7;
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} BCSR;
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static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
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/*
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* Register bit definitions for the BCSRs
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*/
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#define BCSR_WHOAMI_DCID 0x000F
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#define BCSR_WHOAMI_CPLD 0x00F0
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#define BCSR_WHOAMI_BOARD 0x0F00
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#define BCSR_STATUS_PCMCIA0VS 0x0003
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#define BCSR_STATUS_PCMCIA1VS 0x000C
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#define BCSR_STATUS_PCMCIA0FI 0x0010
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#define BCSR_STATUS_PCMCIA1FI 0x0020
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#define BCSR_STATUS_SWAPBOOT 0x0040
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#define BCSR_STATUS_SRAMWIDTH 0x0080
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#define BCSR_STATUS_FLASHBUSY 0x0100
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#define BCSR_STATUS_ROMBUSY 0x0200
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#define BCSR_STATUS_USBOTGID 0x0800
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#define BCSR_STATUS_U0RXD 0x1000
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#define BCSR_STATUS_U1RXD 0x2000
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#define BCSR_STATUS_U3RXD 0x8000
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#define BCSR_SWITCHES_OCTAL 0x00FF
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#define BCSR_SWITCHES_DIP_1 0x0080
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#define BCSR_SWITCHES_DIP_2 0x0040
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#define BCSR_SWITCHES_DIP_3 0x0020
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#define BCSR_SWITCHES_DIP_4 0x0010
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#define BCSR_SWITCHES_DIP_5 0x0008
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#define BCSR_SWITCHES_DIP_6 0x0004
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#define BCSR_SWITCHES_DIP_7 0x0002
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#define BCSR_SWITCHES_DIP_8 0x0001
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#define BCSR_SWITCHES_ROTARY 0x0F00
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#define BCSR_RESETS_PHY0 0x0001
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#define BCSR_RESETS_PHY1 0x0002
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#define BCSR_RESETS_DC 0x0004
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#define BCSR_RESETS_WSC 0x2000
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#define BCSR_RESETS_SPISEL 0x4000
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#define BCSR_RESETS_DMAREQ 0x8000
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#define BCSR_PCMCIA_PC0VPP 0x0003
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#define BCSR_PCMCIA_PC0VCC 0x000C
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#define BCSR_PCMCIA_PC0DRVEN 0x0010
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#define BCSR_PCMCIA_PC0RST 0x0080
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#define BCSR_PCMCIA_PC1VPP 0x0300
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#define BCSR_PCMCIA_PC1VCC 0x0C00
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#define BCSR_PCMCIA_PC1DRVEN 0x1000
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#define BCSR_PCMCIA_PC1RST 0x8000
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#define BCSR_PCI_M66EN 0x0001
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#define BCSR_PCI_M33 0x0100
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#define BCSR_PCI_EXTERNARB 0x0200
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#define BCSR_PCI_GPIO200RST 0x0400
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#define BCSR_PCI_CLKOUT 0x0800
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#define BCSR_PCI_CFGHOST 0x1000
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#define BCSR_LEDS_DECIMALS 0x00FF
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#define BCSR_LEDS_LED0 0x0100
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#define BCSR_LEDS_LED1 0x0200
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#define BCSR_LEDS_LED2 0x0400
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#define BCSR_LEDS_LED3 0x0800
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#define BCSR_SYSTEM_VDDI 0x001F
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#define BCSR_SYSTEM_POWEROFF 0x4000
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#define BCSR_SYSTEM_RESET 0x8000
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#define PCMCIA_MAX_SOCK 1
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#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
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