Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf updates from Ingo Molnar: "The main changes in this cycle were: Kernel side changes: - A couple of x86/cpu cleanups and changes were grandfathered in due to patch dependencies. These clean up the set of CPU model/family matching macros with a consistent namespace and C99 initializer style. - A bunch of updates to various low level PMU drivers: * AMD Family 19h L3 uncore PMU * Intel Tiger Lake uncore support * misc fixes to LBR TOS sampling - optprobe fixes - perf/cgroup: optimize cgroup event sched-in processing - misc cleanups and fixes Tooling side changes are to: - perf {annotate,expr,record,report,stat,test} - perl scripting - libapi, libperf and libtraceevent - vendor events on Intel and S390, ARM cs-etm - Intel PT updates - Documentation changes and updates to core facilities - misc cleanups, fixes and other enhancements" * 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (89 commits) cpufreq/intel_pstate: Fix wrong macro conversion x86/cpu: Cleanup the now unused CPU match macros hwrng: via_rng: Convert to new X86 CPU match macros crypto: Convert to new CPU match macros ASoC: Intel: Convert to new X86 CPU match macros powercap/intel_rapl: Convert to new X86 CPU match macros PCI: intel-mid: Convert to new X86 CPU match macros mmc: sdhci-acpi: Convert to new X86 CPU match macros intel_idle: Convert to new X86 CPU match macros extcon: axp288: Convert to new X86 CPU match macros thermal: Convert to new X86 CPU match macros hwmon: Convert to new X86 CPU match macros platform/x86: Convert to new CPU match macros EDAC: Convert to new X86 CPU match macros cpufreq: Convert to new X86 CPU match macros ACPI: Convert to new X86 CPU match macros x86/platform: Convert to new CPU match macros x86/kernel: Convert to new CPU match macros x86/kvm: Convert to new CPU match macros x86/perf/events: Convert to new CPU match macros ...
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@@ -1079,51 +1079,48 @@ static const struct idle_cpu idle_cpu_dnv __initconst = {
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};
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static const struct x86_cpu_id intel_idle_ids[] __initconst = {
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INTEL_CPU_FAM6(NEHALEM_EP, idle_cpu_nhx),
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INTEL_CPU_FAM6(NEHALEM, idle_cpu_nehalem),
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INTEL_CPU_FAM6(NEHALEM_G, idle_cpu_nehalem),
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INTEL_CPU_FAM6(WESTMERE, idle_cpu_nehalem),
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INTEL_CPU_FAM6(WESTMERE_EP, idle_cpu_nhx),
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INTEL_CPU_FAM6(NEHALEM_EX, idle_cpu_nhx),
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INTEL_CPU_FAM6(ATOM_BONNELL, idle_cpu_atom),
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INTEL_CPU_FAM6(ATOM_BONNELL_MID, idle_cpu_lincroft),
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INTEL_CPU_FAM6(WESTMERE_EX, idle_cpu_nhx),
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INTEL_CPU_FAM6(SANDYBRIDGE, idle_cpu_snb),
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INTEL_CPU_FAM6(SANDYBRIDGE_X, idle_cpu_snx),
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INTEL_CPU_FAM6(ATOM_SALTWELL, idle_cpu_atom),
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INTEL_CPU_FAM6(ATOM_SILVERMONT, idle_cpu_byt),
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INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, idle_cpu_tangier),
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INTEL_CPU_FAM6(ATOM_AIRMONT, idle_cpu_cht),
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INTEL_CPU_FAM6(IVYBRIDGE, idle_cpu_ivb),
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INTEL_CPU_FAM6(IVYBRIDGE_X, idle_cpu_ivt),
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INTEL_CPU_FAM6(HASWELL, idle_cpu_hsw),
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INTEL_CPU_FAM6(HASWELL_X, idle_cpu_hsx),
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INTEL_CPU_FAM6(HASWELL_L, idle_cpu_hsw),
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INTEL_CPU_FAM6(HASWELL_G, idle_cpu_hsw),
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INTEL_CPU_FAM6(ATOM_SILVERMONT_D, idle_cpu_avn),
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INTEL_CPU_FAM6(BROADWELL, idle_cpu_bdw),
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INTEL_CPU_FAM6(BROADWELL_G, idle_cpu_bdw),
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INTEL_CPU_FAM6(BROADWELL_X, idle_cpu_bdx),
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INTEL_CPU_FAM6(BROADWELL_D, idle_cpu_bdx),
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INTEL_CPU_FAM6(SKYLAKE_L, idle_cpu_skl),
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INTEL_CPU_FAM6(SKYLAKE, idle_cpu_skl),
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INTEL_CPU_FAM6(KABYLAKE_L, idle_cpu_skl),
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INTEL_CPU_FAM6(KABYLAKE, idle_cpu_skl),
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INTEL_CPU_FAM6(SKYLAKE_X, idle_cpu_skx),
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INTEL_CPU_FAM6(XEON_PHI_KNL, idle_cpu_knl),
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INTEL_CPU_FAM6(XEON_PHI_KNM, idle_cpu_knl),
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INTEL_CPU_FAM6(ATOM_GOLDMONT, idle_cpu_bxt),
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INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, idle_cpu_bxt),
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INTEL_CPU_FAM6(ATOM_GOLDMONT_D, idle_cpu_dnv),
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INTEL_CPU_FAM6(ATOM_TREMONT_D, idle_cpu_dnv),
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X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &idle_cpu_nhx),
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X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &idle_cpu_nehalem),
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X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_G, &idle_cpu_nehalem),
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X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &idle_cpu_nehalem),
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X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &idle_cpu_nhx),
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X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &idle_cpu_nhx),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL, &idle_cpu_atom),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL_MID, &idle_cpu_lincroft),
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X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &idle_cpu_nhx),
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X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &idle_cpu_snb),
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X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &idle_cpu_snx),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL, &idle_cpu_atom),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &idle_cpu_byt),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &idle_cpu_tangier),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &idle_cpu_cht),
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X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &idle_cpu_ivb),
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X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &idle_cpu_ivt),
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X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &idle_cpu_hsw),
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X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &idle_cpu_hsx),
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X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &idle_cpu_hsw),
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X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &idle_cpu_hsw),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &idle_cpu_avn),
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X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &idle_cpu_bdw),
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X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &idle_cpu_bdw),
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X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &idle_cpu_bdx),
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X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &idle_cpu_bdx),
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X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &idle_cpu_skl),
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X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &idle_cpu_skl),
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X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &idle_cpu_skl),
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X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &idle_cpu_skl),
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X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &idle_cpu_skx),
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X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &idle_cpu_knl),
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X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &idle_cpu_knl),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &idle_cpu_bxt),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &idle_cpu_dnv),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &idle_cpu_dnv),
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{}
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};
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#define INTEL_CPU_FAM6_MWAIT \
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{ X86_VENDOR_INTEL, 6, X86_MODEL_ANY, X86_FEATURE_MWAIT, 0 }
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static const struct x86_cpu_id intel_mwait_ids[] __initconst = {
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INTEL_CPU_FAM6_MWAIT,
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X86_MATCH_VENDOR_FAM_FEATURE(INTEL, 6, X86_FEATURE_MWAIT, NULL),
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{}
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};
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