MIPS: Add arch CDMM definitions and probing
Add architectural definitions and probing for the MIPS Common Device Memory Map (CDMM) region. When supported and enabled at a particular physical address, this region allows some number of per-CPU devices to be discovered and controlled via MMIO. A bit exists in Config3 to determine whether the feature is present, and a CDMMBase CP0 register allows the region to be enabled at a particular physical address. [ralf@linux-mips.org: Sort conflict with other patches.] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9178/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:

committed by
Ralf Baechle

parent
4a91d8fb61
commit
9b3274bd58
@@ -377,6 +377,7 @@ enum cpu_type_enum {
|
||||
#define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */
|
||||
#define MIPS_CPU_FRE 0x800000000ull /* FRE & UFE bits implemented */
|
||||
#define MIPS_CPU_RW_LLB 0x1000000000ull /* LLADDR/LLB writes are allowed */
|
||||
#define MIPS_CPU_CDMM 0x2000000000ull /* CPU has Common Device Memory Map */
|
||||
|
||||
/*
|
||||
* CPU ASE encodings
|
||||
|
Reference in New Issue
Block a user