Merge tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH: "Here is the large set of char/misc driver patches for 5.8-rc1 Included in here are: - habanalabs driver updates, loads - mhi bus driver updates - extcon driver updates - clk driver updates (approved by the clock maintainer) - firmware driver updates - fpga driver updates - gnss driver updates - coresight driver updates - interconnect driver updates - parport driver updates (it's still alive!) - nvmem driver updates - soundwire driver updates - visorbus driver updates - w1 driver updates - various misc driver updates In short, loads of different driver subsystem updates along with the drivers as well. All have been in linux-next for a while with no reported issues" * tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits) habanalabs: correctly cast u64 to void* habanalabs: initialize variable to default value extcon: arizona: Fix runtime PM imbalance on error extcon: max14577: Add proper dt-compatible strings extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()' extcon: remove redundant assignment to variable idx w1: omap-hdq: print dev_err if irq flags are not cleared w1: omap-hdq: fix interrupt handling which did show spurious timeouts w1: omap-hdq: fix return value to be -1 if there is a timeout w1: omap-hdq: cleanup to add missing newline for some dev_dbg /dev/mem: Revoke mappings when a driver claims the region misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages() misc: xilinx-sdfec: cleanup return value in xsdfec_table_write() misc: xilinx-sdfec: improve get_user_pages_fast() error handling nvmem: qfprom: remove incorrect write support habanalabs: handle MMU cache invalidation timeout habanalabs: don't allow hard reset with open processes habanalabs: GAUDI does not support soft-reset habanalabs: add print for soft reset due to event habanalabs: improve MMU cache invalidation code ...
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@@ -46,7 +46,6 @@ struct zynqmp_aead_drv_ctx {
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} alg;
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struct device *dev;
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struct crypto_engine *engine;
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const struct zynqmp_eemi_ops *eemi_ops;
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};
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struct zynqmp_aead_hw_req {
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@@ -80,21 +79,15 @@ static int zynqmp_aes_aead_cipher(struct aead_request *req)
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struct zynqmp_aead_tfm_ctx *tfm_ctx = crypto_aead_ctx(aead);
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struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req);
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struct device *dev = tfm_ctx->dev;
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struct aead_alg *alg = crypto_aead_alg(aead);
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struct zynqmp_aead_drv_ctx *drv_ctx;
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struct zynqmp_aead_hw_req *hwreq;
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dma_addr_t dma_addr_data, dma_addr_hw_req;
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unsigned int data_size;
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unsigned int status;
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int ret;
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size_t dma_size;
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char *kbuf;
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int err;
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drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead);
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if (!drv_ctx->eemi_ops->aes)
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return -ENOTSUPP;
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if (tfm_ctx->keysrc == ZYNQMP_AES_KUP_KEY)
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dma_size = req->cryptlen + ZYNQMP_AES_KEY_SIZE
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+ GCM_AES_IV_SIZE;
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@@ -136,9 +129,12 @@ static int zynqmp_aes_aead_cipher(struct aead_request *req)
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hwreq->key = 0;
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}
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drv_ctx->eemi_ops->aes(dma_addr_hw_req, &status);
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ret = zynqmp_pm_aes_engine(dma_addr_hw_req, &status);
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if (status) {
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if (ret) {
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dev_err(dev, "ERROR: AES PM API failed\n");
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err = ret;
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} else if (status) {
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switch (status) {
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case ZYNQMP_AES_GCM_TAG_MISMATCH_ERR:
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dev_err(dev, "ERROR: Gcm Tag mismatch\n");
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@@ -388,12 +384,6 @@ static int zynqmp_aes_aead_probe(struct platform_device *pdev)
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else
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return -ENODEV;
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aes_drv_ctx.eemi_ops = zynqmp_pm_get_eemi_ops();
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if (IS_ERR(aes_drv_ctx.eemi_ops)) {
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dev_err(dev, "Failed to get ZynqMP EEMI interface\n");
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return PTR_ERR(aes_drv_ctx.eemi_ops);
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}
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err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(ZYNQMP_DMA_BIT_MASK));
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if (err < 0) {
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dev_err(dev, "No usable DMA configuration\n");
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