powerpc, dma: move bestcomm driver from arch/powerpc/sysdev to drivers/dma

The bestcomm dma hardware, and some of its users like the FEC ethernet
component, is used in different FreeScale parts, including non-powerpc
parts like the ColdFire MCF547x & MCF548x families.  Don't keep the
driver hidden in arch/powerpc where it is inaccessible for other arches.
.c files are moved to drivers/dma/bestcomm, while .h files are moved to
include/linux/fsl/bestcomm.  Makefiles, Kconfigs and #include directives
are updated for the new file locations.

Tested by recompiling for MPC5200 with all bestcomm users enabled.

Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This commit is contained in:
Philippe De Muyter
2012-10-12 17:52:45 +02:00
committed by Anatolij Gustschin
parent d1c3ed669a
commit 9a32299394
27 changed files with 27 additions and 27 deletions

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/*
* Header for Bestcomm ATA task driver
*
*
* Copyright (C) 2006 Freescale - John Rigby
* Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef __BESTCOMM_ATA_H__
#define __BESTCOMM_ATA_H__
struct bcom_ata_bd {
u32 status;
u32 src_pa;
u32 dst_pa;
};
extern struct bcom_task * bcom_ata_init(int queue_len, int maxbufsize);
extern void bcom_ata_rx_prepare(struct bcom_task *tsk);
extern void bcom_ata_tx_prepare(struct bcom_task *tsk);
extern void bcom_ata_reset_bd(struct bcom_task *tsk);
extern void bcom_ata_release(struct bcom_task *tsk);
#endif /* __BESTCOMM_ATA_H__ */

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/*
* Public header for the MPC52xx processor BestComm driver
*
*
* Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
* Copyright (C) 2005 Varma Electronics Oy,
* ( by Andrey Volkov <avolkov@varma-el.com> )
* Copyright (C) 2003-2004 MontaVista, Software, Inc.
* ( by Dale Farnsworth <dfarnsworth@mvista.com> )
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef __BESTCOMM_H__
#define __BESTCOMM_H__
/**
* struct bcom_bd - Structure describing a generic BestComm buffer descriptor
* @status: The current status of this buffer. Exact meaning depends on the
* task type
* @data: An array of u32 extra data. Size of array is task dependent.
*
* Note: Don't dereference a bcom_bd pointer as an array. The size of the
* bcom_bd is variable. Use bcom_get_bd() instead.
*/
struct bcom_bd {
u32 status;
u32 data[0]; /* variable payload size */
};
/* ======================================================================== */
/* Generic task management */
/* ======================================================================== */
/**
* struct bcom_task - Structure describing a loaded BestComm task
*
* This structure is never built by the driver it self. It's built and
* filled the intermediate layer of the BestComm API, the task dependent
* support code.
*
* Most likely you don't need to poke around inside this structure. The
* fields are exposed in the header just for the sake of inline functions
*/
struct bcom_task {
unsigned int tasknum;
unsigned int flags;
int irq;
struct bcom_bd *bd;
phys_addr_t bd_pa;
void **cookie;
unsigned short index;
unsigned short outdex;
unsigned int num_bd;
unsigned int bd_size;
void* priv;
};
#define BCOM_FLAGS_NONE 0x00000000ul
#define BCOM_FLAGS_ENABLE_TASK (1ul << 0)
/**
* bcom_enable - Enable a BestComm task
* @tsk: The BestComm task structure
*
* This function makes sure the given task is enabled and can be run
* by the BestComm engine as needed
*/
extern void bcom_enable(struct bcom_task *tsk);
/**
* bcom_disable - Disable a BestComm task
* @tsk: The BestComm task structure
*
* This function disable a given task, making sure it's not executed
* by the BestComm engine.
*/
extern void bcom_disable(struct bcom_task *tsk);
/**
* bcom_get_task_irq - Returns the irq number of a BestComm task
* @tsk: The BestComm task structure
*/
static inline int
bcom_get_task_irq(struct bcom_task *tsk) {
return tsk->irq;
}
/* ======================================================================== */
/* BD based tasks helpers */
/* ======================================================================== */
#define BCOM_BD_READY 0x40000000ul
/** _bcom_next_index - Get next input index.
* @tsk: pointer to task structure
*
* Support function; Device drivers should not call this
*/
static inline int
_bcom_next_index(struct bcom_task *tsk)
{
return ((tsk->index + 1) == tsk->num_bd) ? 0 : tsk->index + 1;
}
/** _bcom_next_outdex - Get next output index.
* @tsk: pointer to task structure
*
* Support function; Device drivers should not call this
*/
static inline int
_bcom_next_outdex(struct bcom_task *tsk)
{
return ((tsk->outdex + 1) == tsk->num_bd) ? 0 : tsk->outdex + 1;
}
/**
* bcom_queue_empty - Checks if a BestComm task BD queue is empty
* @tsk: The BestComm task structure
*/
static inline int
bcom_queue_empty(struct bcom_task *tsk)
{
return tsk->index == tsk->outdex;
}
/**
* bcom_queue_full - Checks if a BestComm task BD queue is full
* @tsk: The BestComm task structure
*/
static inline int
bcom_queue_full(struct bcom_task *tsk)
{
return tsk->outdex == _bcom_next_index(tsk);
}
/**
* bcom_get_bd - Get a BD from the queue
* @tsk: The BestComm task structure
* index: Index of the BD to fetch
*/
static inline struct bcom_bd
*bcom_get_bd(struct bcom_task *tsk, unsigned int index)
{
/* A cast to (void*) so the address can be incremented by the
* real size instead of by sizeof(struct bcom_bd) */
return ((void *)tsk->bd) + (index * tsk->bd_size);
}
/**
* bcom_buffer_done - Checks if a BestComm
* @tsk: The BestComm task structure
*/
static inline int
bcom_buffer_done(struct bcom_task *tsk)
{
struct bcom_bd *bd;
if (bcom_queue_empty(tsk))
return 0;
bd = bcom_get_bd(tsk, tsk->outdex);
return !(bd->status & BCOM_BD_READY);
}
/**
* bcom_prepare_next_buffer - clear status of next available buffer.
* @tsk: The BestComm task structure
*
* Returns pointer to next buffer descriptor
*/
static inline struct bcom_bd *
bcom_prepare_next_buffer(struct bcom_task *tsk)
{
struct bcom_bd *bd;
bd = bcom_get_bd(tsk, tsk->index);
bd->status = 0; /* cleanup last status */
return bd;
}
static inline void
bcom_submit_next_buffer(struct bcom_task *tsk, void *cookie)
{
struct bcom_bd *bd = bcom_get_bd(tsk, tsk->index);
tsk->cookie[tsk->index] = cookie;
mb(); /* ensure the bd is really up-to-date */
bd->status |= BCOM_BD_READY;
tsk->index = _bcom_next_index(tsk);
if (tsk->flags & BCOM_FLAGS_ENABLE_TASK)
bcom_enable(tsk);
}
static inline void *
bcom_retrieve_buffer(struct bcom_task *tsk, u32 *p_status, struct bcom_bd **p_bd)
{
void *cookie = tsk->cookie[tsk->outdex];
struct bcom_bd *bd = bcom_get_bd(tsk, tsk->outdex);
if (p_status)
*p_status = bd->status;
if (p_bd)
*p_bd = bd;
tsk->outdex = _bcom_next_outdex(tsk);
return cookie;
}
#endif /* __BESTCOMM_H__ */

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/*
* Private header for the MPC52xx processor BestComm driver
*
* By private, we mean that driver should not use it directly. It's meant
* to be used by the BestComm engine driver itself and by the intermediate
* layer between the core and the drivers.
*
* Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
* Copyright (C) 2005 Varma Electronics Oy,
* ( by Andrey Volkov <avolkov@varma-el.com> )
* Copyright (C) 2003-2004 MontaVista, Software, Inc.
* ( by Dale Farnsworth <dfarnsworth@mvista.com> )
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef __BESTCOMM_PRIV_H__
#define __BESTCOMM_PRIV_H__
#include <linux/spinlock.h>
#include <linux/of.h>
#include <asm/io.h>
#include <asm/mpc52xx.h>
#include "sram.h"
/* ======================================================================== */
/* Engine related stuff */
/* ======================================================================== */
/* Zones sizes and needed alignments */
#define BCOM_MAX_TASKS 16
#define BCOM_MAX_VAR 24
#define BCOM_MAX_INC 8
#define BCOM_MAX_FDT 64
#define BCOM_MAX_CTX 20
#define BCOM_CTX_SIZE (BCOM_MAX_CTX * sizeof(u32))
#define BCOM_CTX_ALIGN 0x100
#define BCOM_VAR_SIZE (BCOM_MAX_VAR * sizeof(u32))
#define BCOM_INC_SIZE (BCOM_MAX_INC * sizeof(u32))
#define BCOM_VAR_ALIGN 0x80
#define BCOM_FDT_SIZE (BCOM_MAX_FDT * sizeof(u32))
#define BCOM_FDT_ALIGN 0x100
/**
* struct bcom_tdt - Task Descriptor Table Entry
*
*/
struct bcom_tdt {
u32 start;
u32 stop;
u32 var;
u32 fdt;
u32 exec_status; /* used internally by BestComm engine */
u32 mvtp; /* used internally by BestComm engine */
u32 context;
u32 litbase;
};
/**
* struct bcom_engine
*
* This holds all info needed globaly to handle the engine
*/
struct bcom_engine {
struct device_node *ofnode;
struct mpc52xx_sdma __iomem *regs;
phys_addr_t regs_base;
struct bcom_tdt *tdt;
u32 *ctx;
u32 *var;
u32 *fdt;
spinlock_t lock;
};
extern struct bcom_engine *bcom_eng;
/* ======================================================================== */
/* Tasks related stuff */
/* ======================================================================== */
/* Tasks image header */
#define BCOM_TASK_MAGIC 0x4243544B /* 'BCTK' */
struct bcom_task_header {
u32 magic;
u8 desc_size; /* the size fields */
u8 var_size; /* are given in number */
u8 inc_size; /* of 32-bits words */
u8 first_var;
u8 reserved[8];
};
/* Descriptors structure & co */
#define BCOM_DESC_NOP 0x000001f8
#define BCOM_LCD_MASK 0x80000000
#define BCOM_DRD_EXTENDED 0x40000000
#define BCOM_DRD_INITIATOR_SHIFT 21
/* Tasks pragma */
#define BCOM_PRAGMA_BIT_RSV 7 /* reserved pragma bit */
#define BCOM_PRAGMA_BIT_PRECISE_INC 6 /* increment 0=when possible, */
/* 1=iter end */
#define BCOM_PRAGMA_BIT_RST_ERROR_NO 5 /* don't reset errors on */
/* task enable */
#define BCOM_PRAGMA_BIT_PACK 4 /* pack data enable */
#define BCOM_PRAGMA_BIT_INTEGER 3 /* data alignment */
/* 0=frac(msb), 1=int(lsb) */
#define BCOM_PRAGMA_BIT_SPECREAD 2 /* XLB speculative read */
#define BCOM_PRAGMA_BIT_CW 1 /* write line buffer enable */
#define BCOM_PRAGMA_BIT_RL 0 /* read line buffer enable */
/* Looks like XLB speculative read generates XLB errors when a buffer
* is at the end of the physical memory. i.e. when accessing the
* lasts words, the engine tries to prefetch the next but there is no
* next ...
*/
#define BCOM_STD_PRAGMA ((0 << BCOM_PRAGMA_BIT_RSV) | \
(0 << BCOM_PRAGMA_BIT_PRECISE_INC) | \
(0 << BCOM_PRAGMA_BIT_RST_ERROR_NO) | \
(0 << BCOM_PRAGMA_BIT_PACK) | \
(0 << BCOM_PRAGMA_BIT_INTEGER) | \
(0 << BCOM_PRAGMA_BIT_SPECREAD) | \
(1 << BCOM_PRAGMA_BIT_CW) | \
(1 << BCOM_PRAGMA_BIT_RL))
#define BCOM_PCI_PRAGMA ((0 << BCOM_PRAGMA_BIT_RSV) | \
(0 << BCOM_PRAGMA_BIT_PRECISE_INC) | \
(0 << BCOM_PRAGMA_BIT_RST_ERROR_NO) | \
(0 << BCOM_PRAGMA_BIT_PACK) | \
(1 << BCOM_PRAGMA_BIT_INTEGER) | \
(0 << BCOM_PRAGMA_BIT_SPECREAD) | \
(1 << BCOM_PRAGMA_BIT_CW) | \
(1 << BCOM_PRAGMA_BIT_RL))
#define BCOM_ATA_PRAGMA BCOM_STD_PRAGMA
#define BCOM_CRC16_DP_0_PRAGMA BCOM_STD_PRAGMA
#define BCOM_CRC16_DP_1_PRAGMA BCOM_STD_PRAGMA
#define BCOM_FEC_RX_BD_PRAGMA BCOM_STD_PRAGMA
#define BCOM_FEC_TX_BD_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_DP_0_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_DP_1_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_DP_2_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_DP_3_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_DP_BD_0_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_DP_BD_1_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_RX_BD_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_TX_BD_PRAGMA BCOM_STD_PRAGMA
#define BCOM_GEN_LPC_PRAGMA BCOM_STD_PRAGMA
#define BCOM_PCI_RX_PRAGMA BCOM_PCI_PRAGMA
#define BCOM_PCI_TX_PRAGMA BCOM_PCI_PRAGMA
/* Initiators number */
#define BCOM_INITIATOR_ALWAYS 0
#define BCOM_INITIATOR_SCTMR_0 1
#define BCOM_INITIATOR_SCTMR_1 2
#define BCOM_INITIATOR_FEC_RX 3
#define BCOM_INITIATOR_FEC_TX 4
#define BCOM_INITIATOR_ATA_RX 5
#define BCOM_INITIATOR_ATA_TX 6
#define BCOM_INITIATOR_SCPCI_RX 7
#define BCOM_INITIATOR_SCPCI_TX 8
#define BCOM_INITIATOR_PSC3_RX 9
#define BCOM_INITIATOR_PSC3_TX 10
#define BCOM_INITIATOR_PSC2_RX 11
#define BCOM_INITIATOR_PSC2_TX 12
#define BCOM_INITIATOR_PSC1_RX 13
#define BCOM_INITIATOR_PSC1_TX 14
#define BCOM_INITIATOR_SCTMR_2 15
#define BCOM_INITIATOR_SCLPC 16
#define BCOM_INITIATOR_PSC5_RX 17
#define BCOM_INITIATOR_PSC5_TX 18
#define BCOM_INITIATOR_PSC4_RX 19
#define BCOM_INITIATOR_PSC4_TX 20
#define BCOM_INITIATOR_I2C2_RX 21
#define BCOM_INITIATOR_I2C2_TX 22
#define BCOM_INITIATOR_I2C1_RX 23
#define BCOM_INITIATOR_I2C1_TX 24
#define BCOM_INITIATOR_PSC6_RX 25
#define BCOM_INITIATOR_PSC6_TX 26
#define BCOM_INITIATOR_IRDA_RX 25
#define BCOM_INITIATOR_IRDA_TX 26
#define BCOM_INITIATOR_SCTMR_3 27
#define BCOM_INITIATOR_SCTMR_4 28
#define BCOM_INITIATOR_SCTMR_5 29
#define BCOM_INITIATOR_SCTMR_6 30
#define BCOM_INITIATOR_SCTMR_7 31
/* Initiators priorities */
#define BCOM_IPR_ALWAYS 7
#define BCOM_IPR_SCTMR_0 2
#define BCOM_IPR_SCTMR_1 2
#define BCOM_IPR_FEC_RX 6
#define BCOM_IPR_FEC_TX 5
#define BCOM_IPR_ATA_RX 7
#define BCOM_IPR_ATA_TX 7
#define BCOM_IPR_SCPCI_RX 2
#define BCOM_IPR_SCPCI_TX 2
#define BCOM_IPR_PSC3_RX 2
#define BCOM_IPR_PSC3_TX 2
#define BCOM_IPR_PSC2_RX 2
#define BCOM_IPR_PSC2_TX 2
#define BCOM_IPR_PSC1_RX 2
#define BCOM_IPR_PSC1_TX 2
#define BCOM_IPR_SCTMR_2 2
#define BCOM_IPR_SCLPC 2
#define BCOM_IPR_PSC5_RX 2
#define BCOM_IPR_PSC5_TX 2
#define BCOM_IPR_PSC4_RX 2
#define BCOM_IPR_PSC4_TX 2
#define BCOM_IPR_I2C2_RX 2
#define BCOM_IPR_I2C2_TX 2
#define BCOM_IPR_I2C1_RX 2
#define BCOM_IPR_I2C1_TX 2
#define BCOM_IPR_PSC6_RX 2
#define BCOM_IPR_PSC6_TX 2
#define BCOM_IPR_IRDA_RX 2
#define BCOM_IPR_IRDA_TX 2
#define BCOM_IPR_SCTMR_3 2
#define BCOM_IPR_SCTMR_4 2
#define BCOM_IPR_SCTMR_5 2
#define BCOM_IPR_SCTMR_6 2
#define BCOM_IPR_SCTMR_7 2
/* ======================================================================== */
/* API */
/* ======================================================================== */
extern struct bcom_task *bcom_task_alloc(int bd_count, int bd_size, int priv_size);
extern void bcom_task_free(struct bcom_task *tsk);
extern int bcom_load_image(int task, u32 *task_image);
extern void bcom_set_initiator(int task, int initiator);
#define TASK_ENABLE 0x8000
/**
* bcom_disable_prefetch - Hook to disable bus prefetching
*
* ATA DMA and the original MPC5200 need this due to silicon bugs. At the
* moment disabling prefetch is a one-way street. There is no mechanism
* in place to turn prefetch back on after it has been disabled. There is
* no reason it couldn't be done, it would just be more complex to implement.
*/
static inline void bcom_disable_prefetch(void)
{
u16 regval;
regval = in_be16(&bcom_eng->regs->PtdCntrl);
out_be16(&bcom_eng->regs->PtdCntrl, regval | 1);
};
static inline void
bcom_enable_task(int task)
{
u16 reg;
reg = in_be16(&bcom_eng->regs->tcr[task]);
out_be16(&bcom_eng->regs->tcr[task], reg | TASK_ENABLE);
}
static inline void
bcom_disable_task(int task)
{
u16 reg = in_be16(&bcom_eng->regs->tcr[task]);
out_be16(&bcom_eng->regs->tcr[task], reg & ~TASK_ENABLE);
}
static inline u32 *
bcom_task_desc(int task)
{
return bcom_sram_pa2va(bcom_eng->tdt[task].start);
}
static inline int
bcom_task_num_descs(int task)
{
return (bcom_eng->tdt[task].stop - bcom_eng->tdt[task].start)/sizeof(u32) + 1;
}
static inline u32 *
bcom_task_var(int task)
{
return bcom_sram_pa2va(bcom_eng->tdt[task].var);
}
static inline u32 *
bcom_task_inc(int task)
{
return &bcom_task_var(task)[BCOM_MAX_VAR];
}
static inline int
bcom_drd_is_extended(u32 desc)
{
return (desc) & BCOM_DRD_EXTENDED;
}
static inline int
bcom_desc_is_drd(u32 desc)
{
return !(desc & BCOM_LCD_MASK) && desc != BCOM_DESC_NOP;
}
static inline int
bcom_desc_initiator(u32 desc)
{
return (desc >> BCOM_DRD_INITIATOR_SHIFT) & 0x1f;
}
static inline void
bcom_set_desc_initiator(u32 *desc, int initiator)
{
*desc = (*desc & ~(0x1f << BCOM_DRD_INITIATOR_SHIFT)) |
((initiator & 0x1f) << BCOM_DRD_INITIATOR_SHIFT);
}
static inline void
bcom_set_task_pragma(int task, int pragma)
{
u32 *fdt = &bcom_eng->tdt[task].fdt;
*fdt = (*fdt & ~0xff) | pragma;
}
static inline void
bcom_set_task_auto_start(int task, int next_task)
{
u16 __iomem *tcr = &bcom_eng->regs->tcr[task];
out_be16(tcr, (in_be16(tcr) & ~0xff) | 0x00c0 | next_task);
}
static inline void
bcom_set_tcr_initiator(int task, int initiator)
{
u16 __iomem *tcr = &bcom_eng->regs->tcr[task];
out_be16(tcr, (in_be16(tcr) & ~0x1f00) | ((initiator & 0x1f) << 8));
}
#endif /* __BESTCOMM_PRIV_H__ */

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/*
* Header for Bestcomm FEC tasks driver
*
*
* Copyright (C) 2006-2007 Sylvain Munaut <tnt@246tNt.com>
* Copyright (C) 2003-2004 MontaVista, Software, Inc.
* ( by Dale Farnsworth <dfarnsworth@mvista.com> )
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef __BESTCOMM_FEC_H__
#define __BESTCOMM_FEC_H__
struct bcom_fec_bd {
u32 status;
u32 skb_pa;
};
#define BCOM_FEC_TX_BD_TFD 0x08000000ul /* transmit frame done */
#define BCOM_FEC_TX_BD_TC 0x04000000ul /* transmit CRC */
#define BCOM_FEC_TX_BD_ABC 0x02000000ul /* append bad CRC */
#define BCOM_FEC_RX_BD_L 0x08000000ul /* buffer is last in frame */
#define BCOM_FEC_RX_BD_BC 0x00800000ul /* DA is broadcast */
#define BCOM_FEC_RX_BD_MC 0x00400000ul /* DA is multicast and not broadcast */
#define BCOM_FEC_RX_BD_LG 0x00200000ul /* Rx frame length violation */
#define BCOM_FEC_RX_BD_NO 0x00100000ul /* Rx non-octet aligned frame */
#define BCOM_FEC_RX_BD_CR 0x00040000ul /* Rx CRC error */
#define BCOM_FEC_RX_BD_OV 0x00020000ul /* overrun */
#define BCOM_FEC_RX_BD_TR 0x00010000ul /* Rx frame truncated */
#define BCOM_FEC_RX_BD_LEN_MASK 0x000007fful /* mask for length of received frame */
#define BCOM_FEC_RX_BD_ERRORS (BCOM_FEC_RX_BD_LG | BCOM_FEC_RX_BD_NO | \
BCOM_FEC_RX_BD_CR | BCOM_FEC_RX_BD_OV | BCOM_FEC_RX_BD_TR)
extern struct bcom_task *
bcom_fec_rx_init(int queue_len, phys_addr_t fifo, int maxbufsize);
extern int
bcom_fec_rx_reset(struct bcom_task *tsk);
extern void
bcom_fec_rx_release(struct bcom_task *tsk);
extern struct bcom_task *
bcom_fec_tx_init(int queue_len, phys_addr_t fifo);
extern int
bcom_fec_tx_reset(struct bcom_task *tsk);
extern void
bcom_fec_tx_release(struct bcom_task *tsk);
#endif /* __BESTCOMM_FEC_H__ */

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/*
* Header for Bestcomm General Buffer Descriptor tasks driver
*
*
* Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
* Copyright (C) 2006 AppSpec Computer Technologies Corp.
* Jeff Gibbons <jeff.gibbons@appspec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*
*/
#ifndef __BESTCOMM_GEN_BD_H__
#define __BESTCOMM_GEN_BD_H__
struct bcom_gen_bd {
u32 status;
u32 buf_pa;
};
extern struct bcom_task *
bcom_gen_bd_rx_init(int queue_len, phys_addr_t fifo,
int initiator, int ipr, int maxbufsize);
extern int
bcom_gen_bd_rx_reset(struct bcom_task *tsk);
extern void
bcom_gen_bd_rx_release(struct bcom_task *tsk);
extern struct bcom_task *
bcom_gen_bd_tx_init(int queue_len, phys_addr_t fifo,
int initiator, int ipr);
extern int
bcom_gen_bd_tx_reset(struct bcom_task *tsk);
extern void
bcom_gen_bd_tx_release(struct bcom_task *tsk);
/* PSC support utility wrappers */
struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len,
phys_addr_t fifo, int maxbufsize);
struct bcom_task * bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len,
phys_addr_t fifo);
#endif /* __BESTCOMM_GEN_BD_H__ */

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/*
* Handling of a sram zone for bestcomm
*
*
* Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef __BESTCOMM_SRAM_H__
#define __BESTCOMM_SRAM_H__
#include <asm/rheap.h>
#include <asm/mmu.h>
#include <linux/spinlock.h>
/* Structure used internally */
/* The internals are here for the inline functions
* sake, certainly not for the user to mess with !
*/
struct bcom_sram {
phys_addr_t base_phys;
void *base_virt;
unsigned int size;
rh_info_t *rh;
spinlock_t lock;
};
extern struct bcom_sram *bcom_sram;
/* Public API */
extern int bcom_sram_init(struct device_node *sram_node, char *owner);
extern void bcom_sram_cleanup(void);
extern void* bcom_sram_alloc(int size, int align, phys_addr_t *phys);
extern void bcom_sram_free(void *ptr);
static inline phys_addr_t bcom_sram_va2pa(void *va) {
return bcom_sram->base_phys +
(unsigned long)(va - bcom_sram->base_virt);
}
static inline void *bcom_sram_pa2va(phys_addr_t pa) {
return bcom_sram->base_virt +
(unsigned long)(pa - bcom_sram->base_phys);
}
#endif /* __BESTCOMM_SRAM_H__ */