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rt2x00: Unify GPIO register field namings

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The various rt2x00 drivers use different methods to name the different
GPIO register fields indicating the GPIO pin value and the fields
indicating the direction.
Start using a unified naming scheme for the GPIO register fields:
	- <csr>_VAL<x> for fields indicating the GPIO pin value.
	- <csr>_DIR<x> for fields indicating the GPIO pin direction.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
Acked-by: Ivo Van Doorn <ivdoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Gertjan van Wingerde
2012-08-31 19:22:13 +02:00
committed by John W. Linville
parent 605b55186b
commit 99bdf51a68
14 changed files with 142 additions and 131 deletions
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34
drivers/net/wireless/rt2x00/rt2400pci.h
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@@ -660,24 +660,26 @@
/*
* GPIOCSR: GPIO control register.
* GPIOCSR_VALx: Actual GPIO pin x value
* GPIOCSR_DIRx: GPIO direction: 0 = output; 1 = input
*/
#define GPIOCSR 0x0120
#define GPIOCSR_BIT0 FIELD32(0x00000001)
#define GPIOCSR_BIT1 FIELD32(0x00000002)
#define GPIOCSR_BIT2 FIELD32(0x00000004)
#define GPIOCSR_BIT3 FIELD32(0x00000008)
#define GPIOCSR_BIT4 FIELD32(0x00000010)
#define GPIOCSR_BIT5 FIELD32(0x00000020)
#define GPIOCSR_BIT6 FIELD32(0x00000040)
#define GPIOCSR_BIT7 FIELD32(0x00000080)
#define GPIOCSR_BIT8 FIELD32(0x00000100)
#define GPIOCSR_BIT9 FIELD32(0x00000200)
#define GPIOCSR_BIT10 FIELD32(0x00000400)
#define GPIOCSR_BIT11 FIELD32(0x00000800)
#define GPIOCSR_BIT12 FIELD32(0x00001000)
#define GPIOCSR_BIT13 FIELD32(0x00002000)
#define GPIOCSR_BIT14 FIELD32(0x00004000)
#define GPIOCSR_BIT15 FIELD32(0x00008000)
#define GPIOCSR_VAL0 FIELD32(0x00000001)
#define GPIOCSR_VAL1 FIELD32(0x00000002)
#define GPIOCSR_VAL2 FIELD32(0x00000004)
#define GPIOCSR_VAL3 FIELD32(0x00000008)
#define GPIOCSR_VAL4 FIELD32(0x00000010)
#define GPIOCSR_VAL5 FIELD32(0x00000020)
#define GPIOCSR_VAL6 FIELD32(0x00000040)
#define GPIOCSR_VAL7 FIELD32(0x00000080)
#define GPIOCSR_DIR0 FIELD32(0x00000100)
#define GPIOCSR_DIR1 FIELD32(0x00000200)
#define GPIOCSR_DIR2 FIELD32(0x00000400)
#define GPIOCSR_DIR3 FIELD32(0x00000800)
#define GPIOCSR_DIR4 FIELD32(0x00001000)
#define GPIOCSR_DIR5 FIELD32(0x00002000)
#define GPIOCSR_DIR6 FIELD32(0x00004000)
#define GPIOCSR_DIR7 FIELD32(0x00008000)
/*
* BBPPCSR: BBP Pin control register.