[POWERPC] fsl: Convert dts to v1 syntax
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
@@ -1,7 +1,7 @@
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/*
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* Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
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*
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* Copyright 2007 Freescale Semiconductor Inc.
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* Copyright 2007,2008 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@@ -9,6 +9,8 @@
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "pq2fads";
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compatible = "fsl,pq2fads";
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@@ -21,11 +23,11 @@
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cpu@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <d#32>;
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i-cache-line-size = <d#32>;
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d-cache-size = <d#16384>;
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i-cache-size = <d#16384>;
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reg = <0x0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <16384>;
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i-cache-size = <16384>;
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timebase-frequency = <0>;
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clock-frequency = <0>;
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};
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@@ -33,7 +35,7 @@
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memory {
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device_type = "memory";
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reg = <0 0>;
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reg = <0x0 0x0>;
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};
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localbus@f0010100 {
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@@ -41,67 +43,67 @@
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"fsl,pq2-localbus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <f0010100 60>;
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reg = <0xf0010100 0x60>;
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ranges = <0 0 fe000000 00800000
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1 0 f4500000 00008000
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8 0 f8200000 00008000>;
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ranges = <0x0 0x0 0xfe000000 0x800000
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0x1 0x0 0xf4500000 0x8000
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0x8 0x0 0xf8200000 0x8000>;
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flash@0,0 {
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compatible = "jedec-flash";
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reg = <0 0 800000>;
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reg = <0x0 0x0 0x800000>;
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bank-width = <4>;
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device-width = <1>;
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};
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bcsr@1,0 {
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reg = <1 0 20>;
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reg = <0x1 0x0 0x20>;
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compatible = "fsl,pq2fads-bcsr";
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};
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PCI_PIC: pic@8,0 {
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#interrupt-cells = <1>;
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interrupt-controller;
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reg = <8 0 8>;
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reg = <0x8 0x0 0x8>;
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compatible = "fsl,pq2ads-pci-pic";
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interrupt-parent = <&PIC>;
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interrupts = <18 8>;
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interrupts = <24 8>;
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};
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};
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pci@f0010800 {
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device_type = "pci";
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reg = <f0010800 10c f00101ac 8 f00101c4 8>;
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reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
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compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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clock-frequency = <d#66000000>;
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interrupt-map-mask = <f800 0 0 7>;
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clock-frequency = <66000000>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x16 */
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b000 0 0 1 &PCI_PIC 0
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b000 0 0 2 &PCI_PIC 1
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b000 0 0 3 &PCI_PIC 2
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b000 0 0 4 &PCI_PIC 3
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0xb000 0x0 0x0 0x1 &PCI_PIC 0
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0xb000 0x0 0x0 0x2 &PCI_PIC 1
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0xb000 0x0 0x0 0x3 &PCI_PIC 2
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0xb000 0x0 0x0 0x4 &PCI_PIC 3
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/* IDSEL 0x17 */
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b800 0 0 1 &PCI_PIC 4
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b800 0 0 2 &PCI_PIC 5
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b800 0 0 3 &PCI_PIC 6
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b800 0 0 4 &PCI_PIC 7
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0xb800 0x0 0x0 0x1 &PCI_PIC 4
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0xb800 0x0 0x0 0x2 &PCI_PIC 5
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0xb800 0x0 0x0 0x3 &PCI_PIC 6
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0xb800 0x0 0x0 0x4 &PCI_PIC 7
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/* IDSEL 0x18 */
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c000 0 0 1 &PCI_PIC 8
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c000 0 0 2 &PCI_PIC 9
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c000 0 0 3 &PCI_PIC a
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c000 0 0 4 &PCI_PIC b>;
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0xc000 0x0 0x0 0x1 &PCI_PIC 8
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0xc000 0x0 0x0 0x2 &PCI_PIC 9
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0xc000 0x0 0x0 0x3 &PCI_PIC 10
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0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
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interrupt-parent = <&PIC>;
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interrupts = <12 8>;
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ranges = <42000000 0 80000000 80000000 0 20000000
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02000000 0 a0000000 a0000000 0 20000000
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01000000 0 00000000 f6000000 0 02000000>;
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interrupts = <18 8>;
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ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
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};
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soc@f0000000 {
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@@ -109,27 +111,27 @@
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,mpc8280", "fsl,pq2-soc";
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ranges = <00000000 f0000000 00053000>;
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ranges = <0x0 0xf0000000 0x53000>;
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// Temporary -- will go away once kernel uses ranges for get_immrbase().
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reg = <f0000000 00053000>;
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reg = <0xf0000000 0x53000>;
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cpm@119c0 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
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reg = <119c0 30>;
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reg = <0x119c0 0x30>;
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ranges;
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muram@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 10000>;
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ranges = <0x0 0x0 0x10000>;
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data@0 {
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compatible = "fsl,cpm-muram-data";
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reg = <0 2000 9800 800>;
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reg = <0x0 0x2000 0x9800 0x800>;
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};
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};
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@@ -137,53 +139,53 @@
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compatible = "fsl,mpc8280-brg",
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"fsl,cpm2-brg",
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"fsl,cpm-brg";
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reg = <119f0 10 115f0 10>;
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reg = <0x119f0 0x10 0x115f0 0x10>;
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};
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serial@11a00 {
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device_type = "serial";
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compatible = "fsl,mpc8280-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <11a00 20 8000 100>;
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interrupts = <28 8>;
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reg = <0x11a00 0x20 0x8000 0x100>;
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interrupts = <40 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <1>;
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fsl,cpm-command = <00800000>;
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fsl,cpm-command = <0x800000>;
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};
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serial@11a20 {
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device_type = "serial";
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compatible = "fsl,mpc8280-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <11a20 20 8100 100>;
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interrupts = <29 8>;
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reg = <0x11a20 0x20 0x8100 0x100>;
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interrupts = <41 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <2>;
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fsl,cpm-command = <04a00000>;
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fsl,cpm-command = <0x4a00000>;
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};
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ethernet@11320 {
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device_type = "network";
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compatible = "fsl,mpc8280-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <11320 20 8500 100 113b0 1>;
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interrupts = <21 8>;
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reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
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interrupts = <33 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY0>;
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linux,network-index = <0>;
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fsl,cpm-command = <16200300>;
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fsl,cpm-command = <0x16200300>;
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};
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ethernet@11340 {
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device_type = "network";
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compatible = "fsl,mpc8280-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <11340 20 8600 100 113d0 1>;
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interrupts = <22 8>;
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reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
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interrupts = <34 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY1>;
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linux,network-index = <1>;
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fsl,cpm-command = <1a400300>;
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fsl,cpm-command = <0x1a400300>;
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local-mac-address = [00 e0 0c 00 79 01];
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};
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@@ -194,21 +196,21 @@
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"fsl,cpm2-mdio-bitbang";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <10d40 14>;
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reg = <0x10d40 0x14>;
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fsl,mdio-pin = <9>;
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fsl,mdc-pin = <a>;
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fsl,mdc-pin = <10>;
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PHY0: ethernet-phy@0 {
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interrupt-parent = <&PIC>;
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interrupts = <19 2>;
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reg = <0>;
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interrupts = <25 2>;
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reg = <0x0>;
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device_type = "ethernet-phy";
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};
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PHY1: ethernet-phy@1 {
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interrupt-parent = <&PIC>;
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interrupts = <19 2>;
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reg = <3>;
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interrupts = <25 2>;
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reg = <0x3>;
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device_type = "ethernet-phy";
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};
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};
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@@ -218,17 +220,17 @@
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#size-cells = <0>;
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compatible = "fsl,mpc8280-usb",
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"fsl,cpm2-usb";
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reg = <11b60 18 8b00 100>;
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reg = <0x11b60 0x18 0x8b00 0x100>;
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interrupt-parent = <&PIC>;
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interrupts = <b 8>;
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fsl,cpm-command = <2e600000>;
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interrupts = <11 8>;
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fsl,cpm-command = <0x2e600000>;
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};
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};
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PIC: interrupt-controller@10c00 {
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <10c00 80>;
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reg = <0x10c00 0x80>;
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compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
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};
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