[POWERPC] fsl: Convert dts to v1 syntax
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
@@ -1,7 +1,7 @@
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/*
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* MPC7448HPC2 (Taiga) board Device Tree Source
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*
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* Copyright 2006 Freescale Semiconductor Inc.
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* Copyright 2006, 2008 Freescale Semiconductor Inc.
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* 2006 Roy Zang <Roy Zang at freescale.com>.
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*
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* This program is free software; you can redistribute it and/or modify it
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@@ -10,6 +10,7 @@
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "mpc7448hpc2";
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@@ -23,11 +24,11 @@
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PowerPC,7448@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <8000>; // L1, 32K bytes
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i-cache-size = <8000>; // L1, 32K bytes
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reg = <0x0>;
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d-cache-line-size = <32>; // 32 bytes
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i-cache-line-size = <32>; // 32 bytes
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d-cache-size = <0x8000>; // L1, 32K bytes
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i-cache-size = <0x8000>; // L1, 32K bytes
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timebase-frequency = <0>; // 33 MHz, from uboot
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clock-frequency = <0>; // From U-Boot
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bus-frequency = <0>; // From U-Boot
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@@ -36,7 +37,7 @@
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memory {
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device_type = "memory";
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reg = <00000000 20000000 // DDR2 512M at 0
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reg = <0x0 0x20000000 // DDR2 512M at 0
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>;
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};
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@@ -44,14 +45,14 @@
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "tsi-bridge";
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ranges = <00000000 c0000000 00010000>;
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reg = <c0000000 00010000>;
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ranges = <0x0 0xc0000000 0x10000>;
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reg = <0xc0000000 0x10000>;
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bus-frequency = <0>;
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i2c@7000 {
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interrupt-parent = <&mpic>;
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interrupts = <E 0>;
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reg = <7000 400>;
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interrupts = <14 0>;
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reg = <0x7000 0x400>;
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device_type = "i2c";
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compatible = "tsi108-i2c";
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};
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@@ -59,20 +60,20 @@
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MDIO: mdio@6000 {
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device_type = "mdio";
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compatible = "tsi108-mdio";
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reg = <6000 50>;
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reg = <0x6000 0x50>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy8: ethernet-phy@8 {
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interrupt-parent = <&mpic>;
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interrupts = <2 1>;
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reg = <8>;
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reg = <0x8>;
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};
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phy9: ethernet-phy@9 {
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interrupt-parent = <&mpic>;
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interrupts = <2 1>;
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reg = <9>;
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reg = <0x9>;
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};
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};
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@@ -82,9 +83,9 @@
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#size-cells = <0>;
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device_type = "network";
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compatible = "tsi108-ethernet";
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reg = <6000 200>;
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reg = <0x6000 0x200>;
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address = [ 00 06 D2 00 00 01 ];
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interrupts = <10 2>;
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interrupts = <16 2>;
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interrupt-parent = <&mpic>;
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mdio-handle = <&MDIO>;
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phy-handle = <&phy8>;
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@@ -96,9 +97,9 @@
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#size-cells = <0>;
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device_type = "network";
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compatible = "tsi108-ethernet";
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reg = <6400 200>;
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reg = <0x6400 0x200>;
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address = [ 00 06 D2 00 00 02 ];
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interrupts = <11 2>;
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interrupts = <17 2>;
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interrupt-parent = <&mpic>;
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mdio-handle = <&MDIO>;
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phy-handle = <&phy9>;
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@@ -107,18 +108,18 @@
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serial@7808 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <7808 200>;
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clock-frequency = <3f6b5a00>;
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interrupts = <c 0>;
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reg = <0x7808 0x200>;
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clock-frequency = <1064000000>;
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interrupts = <12 0>;
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interrupt-parent = <&mpic>;
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};
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serial@7c08 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <7c08 200>;
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clock-frequency = <3f6b5a00>;
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interrupts = <d 0>;
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reg = <0x7c08 0x200>;
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clock-frequency = <1064000000>;
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interrupts = <13 0>;
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interrupt-parent = <&mpic>;
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};
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@@ -127,7 +128,7 @@
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <7400 400>;
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reg = <0x7400 0x400>;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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big-endian;
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@@ -138,39 +139,39 @@
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <1000 1000>;
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reg = <0x1000 0x1000>;
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bus-range = <0 0>;
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ranges = <02000000 0 e0000000 e0000000 0 1A000000
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01000000 0 00000000 fa000000 0 00010000>;
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clock-frequency = <7f28154>;
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ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000
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0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
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clock-frequency = <133333332>;
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interrupt-parent = <&mpic>;
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interrupts = <17 2>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupts = <23 2>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x11 */
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0800 0 0 1 &RT0 24 0
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0800 0 0 2 &RT0 25 0
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0800 0 0 3 &RT0 26 0
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0800 0 0 4 &RT0 27 0
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0x800 0x0 0x0 0x1 &RT0 0x24 0x0
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0x800 0x0 0x0 0x2 &RT0 0x25 0x0
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0x800 0x0 0x0 0x3 &RT0 0x26 0x0
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0x800 0x0 0x0 0x4 &RT0 0x27 0x0
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/* IDSEL 0x12 */
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1000 0 0 1 &RT0 25 0
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1000 0 0 2 &RT0 26 0
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1000 0 0 3 &RT0 27 0
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1000 0 0 4 &RT0 24 0
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0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
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0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
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0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
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0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
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/* IDSEL 0x13 */
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1800 0 0 1 &RT0 26 0
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1800 0 0 2 &RT0 27 0
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1800 0 0 3 &RT0 24 0
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1800 0 0 4 &RT0 25 0
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0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
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0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
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0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
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0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
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/* IDSEL 0x14 */
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2000 0 0 1 &RT0 27 0
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2000 0 0 2 &RT0 24 0
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2000 0 0 3 &RT0 25 0
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2000 0 0 4 &RT0 26 0
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0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
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0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
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0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
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0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
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>;
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RT0: router@1180 {
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@@ -180,7 +181,7 @@
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#address-cells = <0>;
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#interrupt-cells = <2>;
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big-endian;
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interrupts = <17 2>;
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interrupts = <23 2>;
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interrupt-parent = <&mpic>;
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};
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};
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