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brcm80211: smac: cleanup si_info structure definition

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Number of fields are no longer needed as the BCMA provides it
or makes them redundant. These have been removed.

Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: Alwin Beukers <alwin@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Franky Lin <frankyl@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Arend van Spriel
2011-12-12 15:15:10 -08:00
committed by John W. Linville
parent 3b758a6840
commit 99559f1365
2 changed files with 11 additions and 67 deletions
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27
drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
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@@ -174,39 +174,12 @@ struct si_info {
struct si_pub pub; /* back plane public state (must be first) */
struct bcma_bus *icbus; /* handle to soc interconnect bus */
struct pci_dev *pcibus; /* handle to pci bus */
uint dev_coreid; /* the core provides driver functions */
void *intr_arg; /* interrupt callback function arg */
u32 (*intrsoff_fn) (void *intr_arg); /* turns chip interrupts off */
/* restore chip interrupts */
void (*intrsrestore_fn) (void *intr_arg, u32 arg);
/* check if interrupts are enabled */
bool (*intrsenabled_fn) (void *intr_arg);
struct pcicore_info *pch; /* PCI/E core handle */
struct list_head var_list; /* list of srom variables */
void __iomem *curmap; /* current regs va */
void __iomem *regs[SI_MAXCORES]; /* other regs va */
u32 chipst; /* chip status */
uint curidx; /* current core index */
uint buscoreidx; /* buscore index */
uint numcores; /* # discovered cores */
uint coreid[SI_MAXCORES]; /* id of each core */
u32 coresba[SI_MAXCORES]; /* backplane address of each core */
void *regs2[SI_MAXCORES]; /* 2nd virtual address per core (usbh20) */
u32 coresba2[SI_MAXCORES]; /* 2nd phys address per core (usbh20) */
u32 coresba_size[SI_MAXCORES]; /* backplane address space size */
u32 coresba2_size[SI_MAXCORES]; /* second address space size */
void *curwrap; /* current wrapper va */
void *wrappers[SI_MAXCORES]; /* other cores wrapper va */
u32 wrapba[SI_MAXCORES]; /* address of controlling wrapper */
u32 cia[SI_MAXCORES]; /* erom cia entry for each core */
u32 cib[SI_MAXCORES]; /* erom cia entry for each core */
u32 oob_router; /* oob router registers for axi */
};
/*