Merge branch 'pci/host-layerscape' into next
* pci/host-layerscape: PCI: layerscape: Add support for ls1088a PCI: layerscape: Add support for ls2088a PCI: artpec6: Stop enabling writes to DBI read-only registers PCI: layerscape: Remove unnecessary class code fixup PCI: dwc: Enable write permission for Class Code, Interrupt Pin updates PCI: dwc: Add accessors for write permission of DBI read-only registers PCI: layerscape: Disable outbound windows configured by bootloader PCI: layerscape: Refactor ls1021_pcie_host_init() PCI: layerscape: Move generic init functions earlier in file PCI: layerscape: Add class code and multifunction fixups for ls1021a PCI: layerscape: Move STRFMR1 access out from the DBI write-enable bracket PCI: layerscape: Call dw_pcie_setup_rc() from ls_pcie_host_init()
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@@ -141,12 +141,6 @@ static int artpec6_pcie_establish_link(struct artpec6_pcie *artpec6_pcie)
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artpec6_pcie_writel(artpec6_pcie, PCIECFG, val);
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usleep_range(100, 200);
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/*
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* Enable writing to config regs. This is required as the Synopsys
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* driver changes the class code. That register needs DBI write enable.
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*/
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dw_pcie_writel_dbi(pci, MISC_CONTROL_1_OFF, DBI_RO_WR_EN);
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/* setup root complex */
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dw_pcie_setup_rc(pp);
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