clk: ti: add composite clock support
This is a multipurpose clock node, which contains support for multiple sub-clocks. Uses basic composite clock type to implement the actual functionality, and TI specific gate, mux and divider clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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committed by
Mike Turquette

parent
b1a07b478b
commit
975e15487d
@@ -164,6 +164,14 @@ struct clk_hw_omap {
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/* DPLL Type and DCO Selection Flags */
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#define DPLL_J_TYPE 0x1
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/* Composite clock component types */
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enum {
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CLK_COMPONENT_TYPE_GATE = 0,
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CLK_COMPONENT_TYPE_DIVIDER,
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CLK_COMPONENT_TYPE_MUX,
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CLK_COMPONENT_TYPE_MAX,
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};
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/**
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* struct ti_dt_clk - OMAP DT clock alias declarations
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* @lk: clock lookup definition
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@@ -236,6 +244,9 @@ unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
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unsigned long parent_rate);
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int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate,
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unsigned long parent_rate);
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int omap2_dflt_clk_enable(struct clk_hw *hw);
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void omap2_dflt_clk_disable(struct clk_hw *hw);
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int omap2_dflt_clk_is_enabled(struct clk_hw *hw);
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void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index);
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void ti_dt_clocks_register(struct ti_dt_clk *oclks);
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@@ -243,6 +254,7 @@ void ti_dt_clk_init_provider(struct device_node *np, int index);
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int ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
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ti_of_clk_init_cb_t func);
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int of_ti_clk_autoidle_setup(struct device_node *node);
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int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type);
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#ifdef CONFIG_OF
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void of_ti_clk_allow_autoidle_all(void);
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