clk: ti: add composite clock support

This is a multipurpose clock node, which contains support for multiple
sub-clocks. Uses basic composite clock type to implement the actual
functionality, and TI specific gate, mux and divider clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Tero Kristo
2013-09-09 15:46:45 +03:00
committed by Mike Turquette
parent b1a07b478b
commit 975e15487d
5 changed files with 336 additions and 4 deletions

View File

@@ -164,6 +164,14 @@ struct clk_hw_omap {
/* DPLL Type and DCO Selection Flags */
#define DPLL_J_TYPE 0x1
/* Composite clock component types */
enum {
CLK_COMPONENT_TYPE_GATE = 0,
CLK_COMPONENT_TYPE_DIVIDER,
CLK_COMPONENT_TYPE_MUX,
CLK_COMPONENT_TYPE_MAX,
};
/**
* struct ti_dt_clk - OMAP DT clock alias declarations
* @lk: clock lookup definition
@@ -236,6 +244,9 @@ unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
unsigned long parent_rate);
int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate,
unsigned long parent_rate);
int omap2_dflt_clk_enable(struct clk_hw *hw);
void omap2_dflt_clk_disable(struct clk_hw *hw);
int omap2_dflt_clk_is_enabled(struct clk_hw *hw);
void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index);
void ti_dt_clocks_register(struct ti_dt_clk *oclks);
@@ -243,6 +254,7 @@ void ti_dt_clk_init_provider(struct device_node *np, int index);
int ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
ti_of_clk_init_cb_t func);
int of_ti_clk_autoidle_setup(struct device_node *node);
int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type);
#ifdef CONFIG_OF
void of_ti_clk_allow_autoidle_all(void);