ACPICA: ACPI 6.2: Add support for PinConfig() resource

ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906

ACPI 6.2 introduced a new resource that is used to specify fine-grained
configuration of a pin or set of pins used by a device. The ASL syntax of
this new resource looks like:

  PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
             ResourceSource, ResourceSourceIndex, ResourceUsage,
             DescriptorName, Vendordata) {Pin List}

PinConfigType is an integer with following accepted values:

  0x00 (Default) - No configuration is applied to the pin
  0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor
  0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor
  0x03 (Bias Default) - Set to default biasing
  0x04 (Bias Disable) - All bias settings will be disabled
  0x05 (Bias High Impedance) - Configure the pin as hi_z
  0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where
                         it drives the last value on a tristate bus
  0x07 (Drive Open Drain) - Configure the pin into open drain state
  0x08 (Drive Open Source) - Configure the pin into open source state
  0x09 (Drive Push Pull) - Configure the pin into push-pull state
  0x0a (Drive Strength) - How much the pin can supply current
  0x0b (Slew Rate) - Configure slew rate of the pin
  0x0c (Input Debounce) - Enable input debouncer for the pin
  0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin
  0x0e - 0x7f - Reserved
  0x80 - 0xff - Vendor defined types

The PinConfigValue depends on the type and is expressed as units
suitable for that type (for example bias uses Ohms).

Link: https://github.com/acpica/acpica/commit/a06fdba6
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

drivers/acpi/acpica/rsserial.c

@@ -534,3 +534,81 @@ struct acpi_rsconvert_info acpi_rs_convert_uart_serial_bus[23] = {
 	 AML_OFFSET(uart_serial_bus.default_baud_rate),
 	 1},
 };
+
+/*******************************************************************************
+ *
+ * acpi_rs_convert_pin_config
+ *
+ ******************************************************************************/
+
+struct acpi_rsconvert_info acpi_rs_convert_pin_config[14] = {
+	{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_PIN_CONFIG,
+	 ACPI_RS_SIZE(struct acpi_resource_pin_config),
+	 ACPI_RSC_TABLE_SIZE(acpi_rs_convert_pin_config)},
+
+	{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_PIN_CONFIG,
+	 sizeof(struct aml_resource_pin_config),
+	 0},
+
+	{ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.pin_config.revision_id),
+	 AML_OFFSET(pin_config.revision_id),
+	 1},
+
+	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.pin_config.sharable),
+	 AML_OFFSET(pin_config.flags),
+	 0},
+
+	{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.pin_config.producer_consumer),
+	 AML_OFFSET(pin_config.flags),
+	 1},
+
+	{ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.pin_config.pin_config_type),
+	 AML_OFFSET(pin_config.pin_config_type),
+	 1},
+
+	{ACPI_RSC_MOVE32, ACPI_RS_OFFSET(data.pin_config.pin_config_value),
+	 AML_OFFSET(pin_config.pin_config_value),
+	 1},
+
+	/* Pin Table */
+
+	/*
+	 * It is OK to use GPIO operations here because none of them refer GPIO
+	 * structures directly but instead use offsets given here.
+	 */
+
+	{ACPI_RSC_COUNT_GPIO_PIN,
+	 ACPI_RS_OFFSET(data.pin_config.pin_table_length),
+	 AML_OFFSET(pin_config.pin_table_offset),
+	 AML_OFFSET(pin_config.res_source_offset)},
+
+	{ACPI_RSC_MOVE_GPIO_PIN, ACPI_RS_OFFSET(data.pin_config.pin_table),
+	 AML_OFFSET(pin_config.pin_table_offset),
+	 0},
+
+	/* Resource Source */
+
+	{ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.pin_config.resource_source.index),
+	 AML_OFFSET(pin_config.res_source_index),
+	 1},
+
+	{ACPI_RSC_COUNT_GPIO_RES,
+	 ACPI_RS_OFFSET(data.pin_config.resource_source.string_length),
+	 AML_OFFSET(pin_config.res_source_offset),
+	 AML_OFFSET(pin_config.vendor_offset)},
+
+	{ACPI_RSC_MOVE_GPIO_RES,
+	 ACPI_RS_OFFSET(data.pin_config.resource_source.string_ptr),
+	 AML_OFFSET(pin_config.res_source_offset),
+	 0},
+
+	/* Vendor Data */
+
+	{ACPI_RSC_COUNT_GPIO_VEN, ACPI_RS_OFFSET(data.pin_config.vendor_length),
+	 AML_OFFSET(pin_config.vendor_length),
+	 1},
+
+	{ACPI_RSC_MOVE_GPIO_RES, ACPI_RS_OFFSET(data.pin_config.vendor_data),
+	 AML_OFFSET(pin_config.vendor_offset),
+	 0},
+};