powerpc/powernv: Reserve M64 PEs based on BARs
On PHB3, some PEs might be reserved in advance to reflect the M64 segments consumed by those PEs. We're reserving PEs based on the M64 window of root port, which might contain VF BAR. The PEs for VFs are allocated dynamically, not reserved based on the consumed M64 segments. So the M64 window of root port isn't reliable for the task. Instead, we go through M64 BARs (VF BARs excluded) of PCI devices under the specified root bus and reserve PEs accordingly, as the patch does. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Este cometimento está contido em:

cometido por
Michael Ellerman

ascendente
e9dc4d7f72
cometimento
96a2f92bf8
@@ -110,7 +110,8 @@ struct pnv_phb {
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void (*fixup_phb)(struct pci_controller *hose);
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u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn);
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int (*init_m64)(struct pnv_phb *phb);
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void (*reserve_m64_pe)(struct pnv_phb *phb);
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void (*reserve_m64_pe)(struct pci_bus *bus,
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unsigned long *pe_bitmap, bool all);
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int (*pick_m64_pe)(struct pnv_phb *phb, struct pci_bus *bus, int all);
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int (*get_pe_state)(struct pnv_phb *phb, int pe_no);
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void (*freeze_pe)(struct pnv_phb *phb, int pe_no);
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