genirq: Generic chip: Cache per irq bit mask
Cache the per irq bit mask instead of recalculating it over and over. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Jean-Francois Moine <moinejf@free.fr> Cc: devicetree-discuss@lists.ozlabs.org Cc: Rob Herring <rob.herring@calxeda.com> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Rob Landley <rob@landley.net> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: http://lkml.kernel.org/r/20130506142539.227119865@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@@ -119,6 +119,7 @@ struct irq_domain;
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/**
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* struct irq_data - per irq and irq chip data passed down to chip functions
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* @mask: precomputed bitmask for accessing the chip registers
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* @irq: interrupt number
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* @hwirq: hardware interrupt number, local to the interrupt domain
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* @node: node index useful for balancing
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@@ -138,6 +139,7 @@ struct irq_domain;
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* irq_data.
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*/
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struct irq_data {
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u32 mask;
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unsigned int irq;
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unsigned long hwirq;
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unsigned int node;
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@@ -705,11 +707,13 @@ struct irq_chip_generic {
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* irq chips which need to call irq_set_wake() on
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* the parent irq. Usually GPIO implementations
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* @IRQ_GC_MASK_CACHE_PER_TYPE: Mask cache is chip type private
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* @IRQ_GC_NO_MASK: Do not calculate irq_data->mask
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*/
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enum irq_gc_flags {
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IRQ_GC_INIT_MASK_CACHE = 1 << 0,
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IRQ_GC_INIT_NESTED_LOCK = 1 << 1,
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IRQ_GC_MASK_CACHE_PER_TYPE = 1 << 2,
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IRQ_GC_NO_MASK = 1 << 3,
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};
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/* Generic chip callback functions */
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