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drm/msm/dpu: Remove unnecessary NULL checks

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msm_drm_private.kms will only be NULL in the dummy headless case, so
there is no need to check it in the dpu display driver.

Signed-off-by: Drew Davenport <ddavenport@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Drew Davenport
2019-09-06 13:23:43 -06:00
committed by Rob Clark
parent c3739878a9
commit 9663014004
7 changed files with 19 additions and 45 deletions
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23
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
View File

@@ -55,8 +55,7 @@ static void dpu_core_irq_callback_handler(void *arg, int irq_idx)
int dpu_core_irq_idx_lookup(struct dpu_kms *dpu_kms, int dpu_core_irq_idx_lookup(struct dpu_kms *dpu_kms,
enum dpu_intr_type intr_type, u32 instance_idx) enum dpu_intr_type intr_type, u32 instance_idx)
{ {
if (!dpu_kms || !dpu_kms->hw_intr || if (!dpu_kms->hw_intr || !dpu_kms->hw_intr->ops.irq_idx_lookup)
!dpu_kms->hw_intr->ops.irq_idx_lookup)
return -EINVAL; return -EINVAL;
return dpu_kms->hw_intr->ops.irq_idx_lookup(intr_type, return dpu_kms->hw_intr->ops.irq_idx_lookup(intr_type,
@@ -73,7 +72,7 @@ static int _dpu_core_irq_enable(struct dpu_kms *dpu_kms, int irq_idx)
unsigned long irq_flags; unsigned long irq_flags;
int ret = 0, enable_count; int ret = 0, enable_count;
if (!dpu_kms || !dpu_kms->hw_intr || if (!dpu_kms->hw_intr ||
!dpu_kms->irq_obj.enable_counts || !dpu_kms->irq_obj.enable_counts ||
!dpu_kms->irq_obj.irq_counts) { !dpu_kms->irq_obj.irq_counts) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
@@ -114,7 +113,7 @@ int dpu_core_irq_enable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
{ {
int i, ret = 0, counts; int i, ret = 0, counts;
if (!dpu_kms || !irq_idxs || !irq_count) { if (!irq_idxs || !irq_count) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
return -EINVAL; return -EINVAL;
} }
@@ -138,7 +137,7 @@ static int _dpu_core_irq_disable(struct dpu_kms *dpu_kms, int irq_idx)
{ {
int ret = 0, enable_count; int ret = 0, enable_count;
if (!dpu_kms || !dpu_kms->hw_intr || !dpu_kms->irq_obj.enable_counts) { if (!dpu_kms->hw_intr || !dpu_kms->irq_obj.enable_counts) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
return -EINVAL; return -EINVAL;
} }
@@ -169,7 +168,7 @@ int dpu_core_irq_disable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
{ {
int i, ret = 0, counts; int i, ret = 0, counts;
if (!dpu_kms || !irq_idxs || !irq_count) { if (!irq_idxs || !irq_count) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
return -EINVAL; return -EINVAL;
} }
@@ -186,7 +185,7 @@ int dpu_core_irq_disable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear) u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear)
{ {
if (!dpu_kms || !dpu_kms->hw_intr || if (!dpu_kms->hw_intr ||
!dpu_kms->hw_intr->ops.get_interrupt_status) !dpu_kms->hw_intr->ops.get_interrupt_status)
return 0; return 0;
@@ -205,7 +204,7 @@ int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
{ {
unsigned long irq_flags; unsigned long irq_flags;
if (!dpu_kms || !dpu_kms->irq_obj.irq_cb_tbl) { if (!dpu_kms->irq_obj.irq_cb_tbl) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
return -EINVAL; return -EINVAL;
} }
@@ -240,7 +239,7 @@ int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms, int irq_idx,
{ {
unsigned long irq_flags; unsigned long irq_flags;
if (!dpu_kms || !dpu_kms->irq_obj.irq_cb_tbl) { if (!dpu_kms->irq_obj.irq_cb_tbl) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
return -EINVAL; return -EINVAL;
} }
@@ -274,8 +273,7 @@ int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms, int irq_idx,
static void dpu_clear_all_irqs(struct dpu_kms *dpu_kms) static void dpu_clear_all_irqs(struct dpu_kms *dpu_kms)
{ {
if (!dpu_kms || !dpu_kms->hw_intr || if (!dpu_kms->hw_intr || !dpu_kms->hw_intr->ops.clear_all_irqs)
!dpu_kms->hw_intr->ops.clear_all_irqs)
return; return;
dpu_kms->hw_intr->ops.clear_all_irqs(dpu_kms->hw_intr); dpu_kms->hw_intr->ops.clear_all_irqs(dpu_kms->hw_intr);
@@ -283,8 +281,7 @@ static void dpu_clear_all_irqs(struct dpu_kms *dpu_kms)
static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms) static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms)
{ {
if (!dpu_kms || !dpu_kms->hw_intr || if (!dpu_kms->hw_intr || !dpu_kms->hw_intr->ops.disable_all_irqs)
!dpu_kms->hw_intr->ops.disable_all_irqs)
return; return;
dpu_kms->hw_intr->ops.disable_all_irqs(dpu_kms->hw_intr); dpu_kms->hw_intr->ops.disable_all_irqs(dpu_kms->hw_intr);

12
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
View File

@@ -32,13 +32,7 @@ enum dpu_perf_mode {
static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
{ {
struct msm_drm_private *priv; struct msm_drm_private *priv;
priv = crtc->dev->dev_private; priv = crtc->dev->dev_private;
if (!priv->kms) {
DPU_ERROR("invalid kms\n");
return NULL;
}
return to_dpu_kms(priv->kms); return to_dpu_kms(priv->kms);
} }
@@ -111,7 +105,7 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
} }
kms = _dpu_crtc_get_kms(crtc); kms = _dpu_crtc_get_kms(crtc);
if (!kms || !kms->catalog) { if (!kms->catalog) {
DPU_ERROR("invalid parameters\n"); DPU_ERROR("invalid parameters\n");
return 0; return 0;
} }
@@ -219,7 +213,7 @@ void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc)
} }
kms = _dpu_crtc_get_kms(crtc); kms = _dpu_crtc_get_kms(crtc);
if (!kms || !kms->catalog) { if (!kms->catalog) {
DPU_ERROR("invalid kms\n"); DPU_ERROR("invalid kms\n");
return; return;
} }
@@ -292,7 +286,7 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
} }
kms = _dpu_crtc_get_kms(crtc); kms = _dpu_crtc_get_kms(crtc);
if (!kms || !kms->catalog) { if (!kms->catalog) {
DPU_ERROR("invalid kms\n"); DPU_ERROR("invalid kms\n");
return -EINVAL; return -EINVAL;
} }

14
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
View File

@@ -645,11 +645,6 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc,
priv = drm_enc->dev->dev_private; priv = drm_enc->dev->dev_private;
dpu_kms = to_dpu_kms(priv->kms); dpu_kms = to_dpu_kms(priv->kms);
if (!dpu_kms) {
DPU_ERROR("invalid dpu_kms\n");
return;
}
hw_mdptop = dpu_kms->hw_mdp; hw_mdptop = dpu_kms->hw_mdp;
if (!hw_mdptop) { if (!hw_mdptop) {
DPU_ERROR("invalid mdptop\n"); DPU_ERROR("invalid mdptop\n");
@@ -1098,10 +1093,6 @@ static void _dpu_encoder_virt_enable_helper(struct drm_encoder *drm_enc)
priv = drm_enc->dev->dev_private; priv = drm_enc->dev->dev_private;
dpu_kms = to_dpu_kms(priv->kms); dpu_kms = to_dpu_kms(priv->kms);
if (!dpu_kms) {
DPU_ERROR("invalid dpu_kms\n");
return;
}
dpu_enc = to_dpu_encoder_virt(drm_enc); dpu_enc = to_dpu_encoder_virt(drm_enc);
if (!dpu_enc || !dpu_enc->cur_master) { if (!dpu_enc || !dpu_enc->cur_master) {
@@ -2032,9 +2023,8 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
enum dpu_intf_type intf_type; enum dpu_intf_type intf_type;
struct dpu_enc_phys_init_params phys_params; struct dpu_enc_phys_init_params phys_params;
if (!dpu_enc || !dpu_kms) { if (!dpu_enc) {
DPU_ERROR("invalid arg(s), enc %d kms %d\n", DPU_ERROR("invalid arg(s), enc %d\n", dpu_enc != 0);
dpu_enc != 0, dpu_kms != 0);
return -EINVAL; return -EINVAL;
} }

2
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
View File

@@ -373,7 +373,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config(
} }
dpu_kms = phys_enc->dpu_kms; dpu_kms = phys_enc->dpu_kms;
if (!dpu_kms || !dpu_kms->dev) { if (!dpu_kms->dev) {
DPU_ERROR("invalid device\n"); DPU_ERROR("invalid device\n");
return; return;
} }

2
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
View File

@@ -374,7 +374,7 @@ static void dpu_encoder_phys_vid_mode_set(
struct drm_display_mode *mode, struct drm_display_mode *mode,
struct drm_display_mode *adj_mode) struct drm_display_mode *adj_mode)
{ {
if (!phys_enc || !phys_enc->dpu_kms) { if (!phys_enc) {
DPU_ERROR("invalid encoder/kms\n"); DPU_ERROR("invalid encoder/kms\n");
return; return;
} }

5
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
View File

@@ -461,10 +461,7 @@ static void _dpu_kms_drm_obj_destroy(struct dpu_kms *dpu_kms)
struct msm_drm_private *priv; struct msm_drm_private *priv;
int i; int i;
if (!dpu_kms) { if (!dpu_kms->dev) {
DPU_ERROR("invalid dpu_kms\n");
return;
} else if (!dpu_kms->dev) {
DPU_ERROR("invalid dev\n"); DPU_ERROR("invalid dev\n");
return; return;
} }

6
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
View File

@@ -154,10 +154,6 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
u32 ot_lim; u32 ot_lim;
int ret, i; int ret, i;
if (!dpu_kms) {
DPU_ERROR("invalid arguments\n");
return;
}
mdp = dpu_kms->hw_mdp; mdp = dpu_kms->hw_mdp;
for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) { for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) {
@@ -214,7 +210,7 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
const struct dpu_vbif_qos_tbl *qos_tbl; const struct dpu_vbif_qos_tbl *qos_tbl;
int i; int i;
if (!dpu_kms || !params || !dpu_kms->hw_mdp) { if (!params || !dpu_kms->hw_mdp) {
DPU_ERROR("invalid arguments\n"); DPU_ERROR("invalid arguments\n");
return; return;
} }