MN10300: SMP TLB flushing
Implement global TLB flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
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committad av
David Howells

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dccbf4853a
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965ea4bbb9
@@ -36,6 +36,22 @@
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#define enter_lazy_tlb(mm, tsk) do {} while (0)
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static inline void cpu_ran_vm(int cpu, struct mm_struct *mm)
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{
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#ifdef CONFIG_SMP
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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#endif
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}
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static inline bool cpu_maybe_ran_vm(int cpu, struct mm_struct *mm)
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{
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#ifdef CONFIG_SMP
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return cpumask_test_and_set_cpu(cpu, mm_cpumask(mm));
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#else
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return true;
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#endif
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}
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#ifdef CONFIG_MN10300_TLB_USE_PIDR
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extern unsigned long mmu_context_cache[NR_CPUS];
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#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
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@@ -127,7 +143,13 @@ static inline void activate_context(struct mm_struct *mm)
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (prev != next) {
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#ifdef CONFIG_SMP
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per_cpu(cpu_tlbstate, cpu).active_mm = next;
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#endif
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cpu_ran_vm(cpu, next);
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PTBR = (unsigned long) next->pgd;
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activate_context(next);
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}
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