edac: Convert debugfX to edac_dbg(X,
Use a more common debugging style. Remove __FILE__ uses, add missing newlines, coalesce formats and align arguments. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
此提交包含在：
Joe Perches
@@ -596,9 +596,8 @@ static int decode_mtr(struct i7300_pvt *pvt,
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mtr = pvt->mtr[slot][branch];
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ans = MTR_DIMMS_PRESENT(mtr) ? 1 : 0;
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debugf2("\tMTR%d CH%d: DIMMs are %s (mtr)\n",
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slot, channel,
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ans ? "Present" : "NOT Present");
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edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n",
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slot, channel, ans ? "" : "NOT ");
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/* Determine if there is a DIMM present in this DIMM slot */
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if (!ans)
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@@ -620,24 +619,25 @@ static int decode_mtr(struct i7300_pvt *pvt,
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dinfo->megabytes = 1 << addrBits;
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debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
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edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
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debugf2("\t\tELECTRICAL THROTTLING is %s\n",
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MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
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edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n",
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MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
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debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
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debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANKS(mtr) ? "double" : "single");
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debugf2("\t\tNUMROW: %s\n",
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MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :
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MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :
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MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :
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"65,536 - 16 rows");
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debugf2("\t\tNUMCOL: %s\n",
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MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :
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MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :
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MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :
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"reserved");
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debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes);
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edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
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edac_dbg(2, "\t\tNUMRANK: %s\n",
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MTR_DIMM_RANKS(mtr) ? "double" : "single");
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edac_dbg(2, "\t\tNUMROW: %s\n",
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MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :
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MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :
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MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :
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"65,536 - 16 rows");
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edac_dbg(2, "\t\tNUMCOL: %s\n",
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MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :
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MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :
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MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :
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"reserved");
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edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes);
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/*
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* The type of error detection actually depends of the
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@@ -653,9 +653,9 @@ static int decode_mtr(struct i7300_pvt *pvt,
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dimm->mtype = MEM_FB_DDR2;
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if (IS_SINGLE_MODE(pvt->mc_settings_a)) {
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dimm->edac_mode = EDAC_SECDED;
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debugf2("\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");
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edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");
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} else {
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debugf2("\t\tECC code is on Lockstep mode\n");
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edac_dbg(2, "\t\tECC code is on Lockstep mode\n");
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if (MTR_DRAM_WIDTH(mtr) == 8)
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dimm->edac_mode = EDAC_S8ECD8ED;
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else
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@@ -664,9 +664,9 @@ static int decode_mtr(struct i7300_pvt *pvt,
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/* ask what device type on this row */
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if (MTR_DRAM_WIDTH(mtr) == 8) {
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debugf2("\t\tScrub algorithm for x8 is on %s mode\n",
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IS_SCRBALGO_ENHANCED(pvt->mc_settings) ?
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"enhanced" : "normal");
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edac_dbg(2, "\t\tScrub algorithm for x8 is on %s mode\n",
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IS_SCRBALGO_ENHANCED(pvt->mc_settings) ?
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"enhanced" : "normal");
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dimm->dtype = DEV_X8;
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} else
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@@ -700,14 +700,14 @@ static void print_dimm_size(struct i7300_pvt *pvt)
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p += n;
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space -= n;
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}
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debugf2("%s\n", pvt->tmp_prt_buffer);
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edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
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p = pvt->tmp_prt_buffer;
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space = PAGE_SIZE;
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n = snprintf(p, space, "-------------------------------"
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"------------------------------");
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p += n;
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space -= n;
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debugf2("%s\n", pvt->tmp_prt_buffer);
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edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
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p = pvt->tmp_prt_buffer;
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space = PAGE_SIZE;
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@@ -723,7 +723,7 @@ static void print_dimm_size(struct i7300_pvt *pvt)
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space -= n;
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}
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debugf2("%s\n", pvt->tmp_prt_buffer);
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edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
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p = pvt->tmp_prt_buffer;
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space = PAGE_SIZE;
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}
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@@ -732,7 +732,7 @@ static void print_dimm_size(struct i7300_pvt *pvt)
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"------------------------------");
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p += n;
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space -= n;
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debugf2("%s\n", pvt->tmp_prt_buffer);
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edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
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p = pvt->tmp_prt_buffer;
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space = PAGE_SIZE;
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#endif
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@@ -755,7 +755,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
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pvt = mci->pvt_info;
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debugf2("Memory Technology Registers:\n");
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edac_dbg(2, "Memory Technology Registers:\n");
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/* Get the AMB present registers for the four channels */
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for (branch = 0; branch < MAX_BRANCHES; branch++) {
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@@ -764,15 +764,15 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
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pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch],
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AMBPRESENT_0,
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&pvt->ambpresent[channel]);
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debugf2("\t\tAMB-present CH%d = 0x%x:\n",
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channel, pvt->ambpresent[channel]);
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edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
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channel, pvt->ambpresent[channel]);
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channel = to_channel(1, branch);
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pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch],
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AMBPRESENT_1,
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&pvt->ambpresent[channel]);
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debugf2("\t\tAMB-present CH%d = 0x%x:\n",
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channel, pvt->ambpresent[channel]);
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edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
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channel, pvt->ambpresent[channel]);
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}
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/* Get the set of MTR[0-7] regs by each branch */
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@@ -814,12 +814,11 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
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static void decode_mir(int mir_no, u16 mir[MAX_MIR])
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{
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if (mir[mir_no] & 3)
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debugf2("MIR%d: limit= 0x%x Branch(es) that participate:"
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" %s %s\n",
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mir_no,
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(mir[mir_no] >> 4) & 0xfff,
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(mir[mir_no] & 1) ? "B0" : "",
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(mir[mir_no] & 2) ? "B1" : "");
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edac_dbg(2, "MIR%d: limit= 0x%x Branch(es) that participate: %s %s\n",
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mir_no,
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(mir[mir_no] >> 4) & 0xfff,
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(mir[mir_no] & 1) ? "B0" : "",
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(mir[mir_no] & 2) ? "B1" : "");
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}
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/**
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@@ -839,17 +838,17 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
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pci_read_config_dword(pvt->pci_dev_16_0_fsb_ctlr, AMBASE,
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(u32 *) &pvt->ambase);
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debugf2("AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase);
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edac_dbg(2, "AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase);
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/* Get the Branch Map regs */
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pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, TOLM, &pvt->tolm);
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pvt->tolm >>= 12;
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debugf2("TOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm,
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pvt->tolm);
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edac_dbg(2, "TOLM (number of 256M regions) =%u (0x%x)\n",
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pvt->tolm, pvt->tolm);
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actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28));
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debugf2("Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
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actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
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edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
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actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
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/* Get memory controller settings */
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pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, MC_SETTINGS,
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@@ -858,15 +857,15 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
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&pvt->mc_settings_a);
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if (IS_SINGLE_MODE(pvt->mc_settings_a))
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debugf0("Memory controller operating on single mode\n");
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edac_dbg(0, "Memory controller operating on single mode\n");
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else
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debugf0("Memory controller operating on %s mode\n",
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IS_MIRRORED(pvt->mc_settings) ? "mirrored" : "non-mirrored");
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edac_dbg(0, "Memory controller operating on %smirrored mode\n",
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IS_MIRRORED(pvt->mc_settings) ? "" : "non-");
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debugf0("Error detection is %s\n",
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IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
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debugf0("Retry is %s\n",
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IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
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edac_dbg(0, "Error detection is %s\n",
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IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
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edac_dbg(0, "Retry is %s\n",
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IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
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/* Get Memory Interleave Range registers */
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pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR0,
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@@ -960,18 +959,18 @@ static int __devinit i7300_get_devices(struct mem_ctl_info *mci)
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}
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}
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debugf1("System Address, processor bus- PCI Bus ID: %s %x:%x\n",
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pci_name(pvt->pci_dev_16_0_fsb_ctlr),
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pvt->pci_dev_16_0_fsb_ctlr->vendor,
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pvt->pci_dev_16_0_fsb_ctlr->device);
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debugf1("Branchmap, control and errors - PCI Bus ID: %s %x:%x\n",
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pci_name(pvt->pci_dev_16_1_fsb_addr_map),
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pvt->pci_dev_16_1_fsb_addr_map->vendor,
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pvt->pci_dev_16_1_fsb_addr_map->device);
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debugf1("FSB Error Regs - PCI Bus ID: %s %x:%x\n",
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pci_name(pvt->pci_dev_16_2_fsb_err_regs),
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pvt->pci_dev_16_2_fsb_err_regs->vendor,
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pvt->pci_dev_16_2_fsb_err_regs->device);
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edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n",
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pci_name(pvt->pci_dev_16_0_fsb_ctlr),
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pvt->pci_dev_16_0_fsb_ctlr->vendor,
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pvt->pci_dev_16_0_fsb_ctlr->device);
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edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n",
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pci_name(pvt->pci_dev_16_1_fsb_addr_map),
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pvt->pci_dev_16_1_fsb_addr_map->vendor,
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pvt->pci_dev_16_1_fsb_addr_map->device);
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edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n",
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pci_name(pvt->pci_dev_16_2_fsb_err_regs),
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pvt->pci_dev_16_2_fsb_err_regs->vendor,
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pvt->pci_dev_16_2_fsb_err_regs->device);
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pvt->pci_dev_2x_0_fbd_branch[0] = pci_get_device(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_I7300_MCH_FB0,
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@@ -1022,9 +1021,9 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
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if (rc == -EIO)
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return rc;
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debugf0("MC: pdev bus %u dev=0x%x fn=0x%x\n",
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pdev->bus->number,
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PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
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edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n",
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pdev->bus->number,
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PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
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/* We only are looking for func 0 of the set */
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if (PCI_FUNC(pdev->devfn) != 0)
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@@ -1044,7 +1043,7 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
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if (mci == NULL)
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return -ENOMEM;
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debugf0("MC: mci = %p\n", mci);
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edac_dbg(0, "MC: mci = %p\n", mci);
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mci->pdev = &pdev->dev; /* record ptr to the generic device */
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@@ -1077,18 +1076,16 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
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/* initialize the MC control structure 'csrows' table
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* with the mapping and control information */
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if (i7300_get_mc_regs(mci)) {
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debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n"
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" because i7300_init_csrows() returned nonzero "
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"value\n");
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edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i7300_init_csrows() returned nonzero value\n");
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mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */
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} else {
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debugf1("MC: Enable error reporting now\n");
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edac_dbg(1, "MC: Enable error reporting now\n");
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i7300_enable_error_reporting(mci);
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}
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/* add this new MC control structure to EDAC's list of MCs */
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if (edac_mc_add_mc(mci)) {
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debugf0("MC: failed edac_mc_add_mc()\n");
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edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
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/* FIXME: perhaps some code should go here that disables error
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* reporting if we just enabled it
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*/
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@@ -1130,7 +1127,7 @@ static void __devexit i7300_remove_one(struct pci_dev *pdev)
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struct mem_ctl_info *mci;
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char *tmp;
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debugf0("\n");
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edac_dbg(0, "\n");
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if (i7300_pci)
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edac_pci_release_generic_ctl(i7300_pci);
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@@ -1177,7 +1174,7 @@ static int __init i7300_init(void)
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{
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int pci_rc;
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debugf2("\n");
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edac_dbg(2, "\n");
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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@@ -1192,7 +1189,7 @@ static int __init i7300_init(void)
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*/
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static void __exit i7300_exit(void)
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{
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debugf2("\n");
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edac_dbg(2, "\n");
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pci_unregister_driver(&i7300_driver);
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}
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