Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "A small number of ARM fixes - Fix function tracer and unwinder dependencies so that we don't end up building kernels that will crash - Fix ARMv7M nommu initialisation (missing register initialisation) - Fix EFI decompressor entry (ensuring barrier instructions are enabled prior to use)" * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache ARM: 8856/1: NOMMU: Fix CCR register faulty initialization when MPU is disabled ARM: fix function graph tracer and unwinder dependencies
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@@ -1438,7 +1438,21 @@ ENTRY(efi_stub_entry)
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@ Preserve return value of efi_entry() in r4
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mov r4, r0
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bl cache_clean_flush
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@ our cache maintenance code relies on CP15 barrier instructions
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@ but since we arrived here with the MMU and caches configured
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@ by UEFI, we must check that the CP15BEN bit is set in SCTLR.
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@ Note that this bit is RAO/WI on v6 and earlier, so the ISB in
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@ the enable path will be executed on v7+ only.
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mrc p15, 0, r1, c1, c0, 0 @ read SCTLR
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tst r1, #(1 << 5) @ CP15BEN bit set?
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bne 0f
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orr r1, r1, #(1 << 5) @ CP15 barrier instructions
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mcr p15, 0, r1, c1, c0, 0 @ write SCTLR
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ARM( .inst 0xf57ff06f @ v7+ isb )
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THUMB( isb )
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0: bl cache_clean_flush
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bl cache_off
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@ Set parameters for booting zImage according to boot protocol
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