drivers: mmc: sdhci_am654: Add the quirk to set TESTCD bit
[ Upstream commit c7666240ec76422cb7546bd07cc8ae80dc0ccdd2 ]
The ARASAN MMC controller on Keystone 3 class of devices need the SDCD
line to be connected for proper functioning. Similar to the issue pointed
out in sdhci-of-arasan.c driver, commit 3794c54264
("mmc:
sdhci-of-arasan: Set controller to test mode when no CD bit").
In cases where this can't be connected, add a quirk to force the
controller into test mode and set the TESTCD bit. Use the flag
"ti,fails-without-test-cd", to implement this above quirk when required.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20220425063120.10135-3-a-govindraju@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:

committed by
Greg Kroah-Hartman

parent
90281cadf5
commit
95050b9847
@@ -147,6 +147,9 @@ struct sdhci_am654_data {
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int drv_strength;
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int drv_strength;
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int strb_sel;
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int strb_sel;
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u32 flags;
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u32 flags;
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u32 quirks;
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#define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0)
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};
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};
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struct sdhci_am654_driver_data {
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struct sdhci_am654_driver_data {
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@@ -369,6 +372,21 @@ static void sdhci_am654_write_b(struct sdhci_host *host, u8 val, int reg)
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}
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}
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}
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}
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static void sdhci_am654_reset(struct sdhci_host *host, u8 mask)
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{
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u8 ctrl;
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);
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sdhci_reset(host, mask);
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if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) {
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ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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ctrl |= SDHCI_CTRL_CDTEST_INS | SDHCI_CTRL_CDTEST_EN;
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sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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}
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}
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static int sdhci_am654_execute_tuning(struct mmc_host *mmc, u32 opcode)
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static int sdhci_am654_execute_tuning(struct mmc_host *mmc, u32 opcode)
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{
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{
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struct sdhci_host *host = mmc_priv(mmc);
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struct sdhci_host *host = mmc_priv(mmc);
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@@ -500,7 +518,7 @@ static struct sdhci_ops sdhci_j721e_4bit_ops = {
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.set_clock = sdhci_j721e_4bit_set_clock,
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.set_clock = sdhci_j721e_4bit_set_clock,
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.write_b = sdhci_am654_write_b,
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.write_b = sdhci_am654_write_b,
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.irq = sdhci_am654_cqhci_irq,
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.irq = sdhci_am654_cqhci_irq,
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.reset = sdhci_reset,
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.reset = sdhci_am654_reset,
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};
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};
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static const struct sdhci_pltfm_data sdhci_j721e_4bit_pdata = {
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static const struct sdhci_pltfm_data sdhci_j721e_4bit_pdata = {
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@@ -719,6 +737,9 @@ static int sdhci_am654_get_of_property(struct platform_device *pdev,
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device_property_read_u32(dev, "ti,clkbuf-sel",
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device_property_read_u32(dev, "ti,clkbuf-sel",
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&sdhci_am654->clkbuf_sel);
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&sdhci_am654->clkbuf_sel);
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if (device_property_read_bool(dev, "ti,fails-without-test-cd"))
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sdhci_am654->quirks |= SDHCI_AM654_QUIRK_FORCE_CDTEST;
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sdhci_get_of_property(pdev);
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sdhci_get_of_property(pdev);
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return 0;
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return 0;
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