Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (57 commits) drm/i915: Handle ERESTARTSYS during page fault drm/i915: Warn before mmaping a purgeable buffer. drm/i915: Track purged state. drm/i915: Remove eviction debug spam drm/i915: Immediately discard any backing storage for uneeded objects drm/i915: Do not mis-classify clean objects as purgeable drm/i915: Whitespace correction for madv drm/i915: BUG_ON page refleak during unbind drm/i915: Search harder for a reusable object drm/i915: Clean up evict from list. drm/i915: Add tracepoints drm/i915: framebuffer compression for GM45+ drm/i915: split display functions by chip type drm/i915: Skip the sanity checks if the current relocation is valid drm/i915: Check that the relocation points to within the target drm/i915: correct FBC update when pipe base update occurs drm/i915: blacklist Acer AspireOne lid status ACPI: make ACPI button funcs no-ops if not built in drm/i915: prevent FIFO calculation overflows on 32 bits with high dotclocks drm/i915: intel_display.c handle latency variable efficiently ... Fix up trivial conflicts in drivers/gpu/drm/i915/{i915_dma.c|i915_drv.h}
This commit is contained in:
25
include/acpi/button.h
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25
include/acpi/button.h
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@@ -0,0 +1,25 @@
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#ifndef ACPI_BUTTON_H
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#define ACPI_BUTTON_H
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#include <linux/notifier.h>
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#if defined(CONFIG_ACPI_BUTTON) || defined(CONFIG_ACPI_BUTTON_MODULE)
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extern int acpi_lid_notifier_register(struct notifier_block *nb);
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extern int acpi_lid_notifier_unregister(struct notifier_block *nb);
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extern int acpi_lid_open(void);
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#else
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static inline int acpi_lid_notifier_register(struct notifier_block *nb)
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{
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return 0;
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}
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static inline int acpi_lid_notifier_unregister(struct notifier_block *nb)
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{
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return 0;
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}
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static inline int acpi_lid_open(void)
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{
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return 1;
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}
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#endif /* defined(CONFIG_ACPI_BUTTON) || defined(CONFIG_ACPI_BUTTON_MODULE) */
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#endif /* ACPI_BUTTON_H */
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@@ -552,6 +552,7 @@
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{0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0x2e32, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0x2e42, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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@@ -185,6 +185,7 @@ typedef struct _drm_i915_sarea {
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#define DRM_I915_GEM_GET_APERTURE 0x23
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#define DRM_I915_GEM_MMAP_GTT 0x24
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#define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25
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#define DRM_I915_GEM_MADVISE 0x26
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#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
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#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
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@@ -221,6 +222,7 @@ typedef struct _drm_i915_sarea {
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#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling)
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#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture)
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#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_intel_get_pipe_from_crtc_id)
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#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise)
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/* Allow drivers to submit batchbuffers directly to hardware, relying
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* on the security mechanisms provided by hardware.
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@@ -667,4 +669,21 @@ struct drm_i915_get_pipe_from_crtc_id {
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__u32 pipe;
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};
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#define I915_MADV_WILLNEED 0
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#define I915_MADV_DONTNEED 1
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#define __I915_MADV_PURGED 2 /* internal state */
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struct drm_i915_gem_madvise {
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/** Handle of the buffer to change the backing store advice */
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__u32 handle;
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/* Advice: either the buffer will be needed again in the near future,
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* or wont be and could be discarded under memory pressure.
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*/
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__u32 madv;
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/** Whether the backing store still exists. */
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__u32 retained;
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};
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#endif /* _I915_DRM_H_ */
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