net/mlx5e: Add support for RXALL netdev feature
Introduce new access register named Ports Check Mask Register (PCMR) to control all HW checks on port. With this register, the driver can enable/disable Hardware FCS validation. When RXALL is enabled/disabled using ndo_set_features, enable/disable fcs check at HW. User can change HW configuration using rx-all flag at ethtool. Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Gal Pressman <galp@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

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0e405443e8
commit
94cb1ebbaf
@@ -112,6 +112,7 @@ enum {
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MLX5_REG_PMPE = 0x5010,
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MLX5_REG_PELC = 0x500e,
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MLX5_REG_PVLC = 0x500f,
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MLX5_REG_PCMR = 0x5041,
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MLX5_REG_PMLP = 0, /* TBD */
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MLX5_REG_NODE_DESC = 0x6001,
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MLX5_REG_HOST_ENDIANNESS = 0x7004,
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@@ -84,4 +84,8 @@ int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
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int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
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int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);
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int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);
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void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,
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bool *enabled);
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#endif /* __MLX5_PORT_H__ */
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