serial: stm32-usart: Correct CSIZE, bits, and parity
[ Upstream commit 1deeda8d2877c18bc2b9eeee10dd6d2628852848 ]
Add CSIZE sanitization for unsupported CSIZE configurations. In
addition, if parity is asked for but CSx was unsupported, the sensible
result is CS8+parity which requires setting USART_CR1_M0 like with 9
bits.
Incorrect CSIZE results in miscalculation of the frame bits in
tty_get_char_size() or in its predecessor where the roughly the same
code is directly within uart_update_timeout().
Fixes: c8a9d04394
(serial: stm32: fix word length configuration)
Cc: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20220519081808.3776-9-ilpo.jarvinen@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:

committed by
Greg Kroah-Hartman

parent
b7e560d2ff
commit
94acaaad47
@@ -810,13 +810,22 @@ static void stm32_usart_set_termios(struct uart_port *port,
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* CS8 or (CS7 + parity), 8 bits word aka [M1:M0] = 0b00
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* CS8 or (CS7 + parity), 8 bits word aka [M1:M0] = 0b00
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* M0 and M1 already cleared by cr1 initialization.
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* M0 and M1 already cleared by cr1 initialization.
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*/
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*/
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if (bits == 9)
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if (bits == 9) {
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cr1 |= USART_CR1_M0;
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cr1 |= USART_CR1_M0;
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else if ((bits == 7) && cfg->has_7bits_data)
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} else if ((bits == 7) && cfg->has_7bits_data) {
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cr1 |= USART_CR1_M1;
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cr1 |= USART_CR1_M1;
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else if (bits != 8)
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} else if (bits != 8) {
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dev_dbg(port->dev, "Unsupported data bits config: %u bits\n"
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dev_dbg(port->dev, "Unsupported data bits config: %u bits\n"
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, bits);
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, bits);
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cflag &= ~CSIZE;
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cflag |= CS8;
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termios->c_cflag = cflag;
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bits = 8;
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if (cflag & PARENB) {
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bits++;
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cr1 |= USART_CR1_M0;
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}
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}
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if (ofs->rtor != UNDEF_REG && (stm32_port->rx_ch ||
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if (ofs->rtor != UNDEF_REG && (stm32_port->rx_ch ||
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stm32_port->fifoen)) {
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stm32_port->fifoen)) {
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