cxl: Check if PSL data-cache is available before issue flush request
PSL9D doesn't have a data-cache that needs to be flushed before resetting the card. However when cxl tries to flush data-cache on such a card, it times-out as PSL_Control register never indicates flush operation complete due to missing data-cache. This is usually indicated in the kernel logs with this message: "WARNING: cache flush timed out" To fix this the patch checks PSL_Debug register CDC-Field(BIT:27) which indicates the absence of a data-cache and sets a flag 'no_data_cache' in 'struct cxl_native' to indicate this. When cxl_data_cache_flush() is called it checks the flag and if set bails out early without requesting a data-cache flush operation to the PSL. Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman

parent
02b63b4202
commit
94322ed8e8
@@ -353,8 +353,17 @@ int cxl_data_cache_flush(struct cxl *adapter)
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u64 reg;
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unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT);
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pr_devel("Flushing data cache\n");
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/*
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* Do a datacache flush only if datacache is available.
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* In case of PSL9D datacache absent hence flush operation.
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* would timeout.
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*/
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if (adapter->native->no_data_cache) {
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pr_devel("No PSL data cache. Ignoring cache flush req.\n");
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return 0;
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}
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pr_devel("Flushing data cache\n");
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reg = cxl_p1_read(adapter, CXL_PSL_Control);
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reg |= CXL_PSL_Control_Fr;
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cxl_p1_write(adapter, CXL_PSL_Control, reg);
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