drm/radeon/dpm: implement UVD powergating for CI
Disable the UVD block when not in use to save power. The block is not actually powergated on CI, but we switch between UVD DPM (where the uvd clocks are adjusted on demand) and clocks off. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -2470,6 +2470,7 @@ static struct radeon_asic ci_asic = {
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.debugfs_print_current_performance_level = &ci_dpm_debugfs_print_current_performance_level,
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.force_performance_level = &ci_dpm_force_performance_level,
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.vblank_too_short = &ci_dpm_vblank_too_short,
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.powergate_uvd = &ci_dpm_powergate_uvd,
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},
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.pflip = {
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.pre_page_flip = &evergreen_pre_page_flip,
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