Merge branches 'acpi-video', 'acpi-battery', 'acpi-spcr' and 'acpi-misc'

* acpi-video:
  ACPI / video: Add force_none quirk for Dell OptiPlex 9020M

* acpi-battery:
  ACPI: make device_attribute const

* acpi-spcr:
  ACPI: SPCR: work around clock issue on xgene UART
  ACPI: SPCR: extend XGENE 8250 workaround to m400

* acpi-misc:
  ACPI / dock: constify attribute_group structure
  MAINTAINERS: Add Tony and Boris as ACPI/APEI reviewers
  ACPI / lpat: Fix typos in comments and kerneldoc style
  MAINTAINERS: device property: ACPI: add fwnode.h
This commit is contained in:
Rafael J. Wysocki
2017-09-03 23:54:29 +02:00
7 fájl változott, egészen pontosan 50 új sor hozzáadva és 12 régi sor törölve

Fájl megtekintése

@@ -53,17 +53,24 @@ static bool qdf2400_erratum_44_present(struct acpi_table_header *h)
*/
static bool xgene_8250_erratum_present(struct acpi_table_spcr *tb)
{
bool xgene_8250 = false;
if (tb->interface_type != ACPI_DBG2_16550_COMPATIBLE)
return false;
if (memcmp(tb->header.oem_id, "APMC0D", ACPI_OEM_ID_SIZE))
if (memcmp(tb->header.oem_id, "APMC0D", ACPI_OEM_ID_SIZE) &&
memcmp(tb->header.oem_id, "HPE ", ACPI_OEM_ID_SIZE))
return false;
if (!memcmp(tb->header.oem_table_id, "XGENESPC",
ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 0)
return true;
xgene_8250 = true;
return false;
if (!memcmp(tb->header.oem_table_id, "ProLiant",
ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 1)
xgene_8250 = true;
return xgene_8250;
}
/**
@@ -182,11 +189,19 @@ int __init parse_spcr(bool earlycon)
uart = "qdf2400_e44";
}
if (xgene_8250_erratum_present(table))
if (xgene_8250_erratum_present(table)) {
iotype = "mmio32";
snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
table->serial_port.address, baud_rate);
/* for xgene v1 and v2 we don't know the clock rate of the
* UART so don't attempt to change to the baud rate state
* in the table because driver cannot calculate the dividers
*/
snprintf(opts, sizeof(opts), "%s,%s,0x%llx", uart, iotype,
table->serial_port.address);
} else {
snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
table->serial_port.address, baud_rate);
}
pr_info("console: %s\n", opts);