Merge branches 'acpi-video', 'acpi-battery', 'acpi-spcr' and 'acpi-misc'
* acpi-video: ACPI / video: Add force_none quirk for Dell OptiPlex 9020M * acpi-battery: ACPI: make device_attribute const * acpi-spcr: ACPI: SPCR: work around clock issue on xgene UART ACPI: SPCR: extend XGENE 8250 workaround to m400 * acpi-misc: ACPI / dock: constify attribute_group structure MAINTAINERS: Add Tony and Boris as ACPI/APEI reviewers ACPI / lpat: Fix typos in comments and kerneldoc style MAINTAINERS: device property: ACPI: add fwnode.h
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@@ -53,17 +53,24 @@ static bool qdf2400_erratum_44_present(struct acpi_table_header *h)
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*/
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static bool xgene_8250_erratum_present(struct acpi_table_spcr *tb)
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{
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bool xgene_8250 = false;
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if (tb->interface_type != ACPI_DBG2_16550_COMPATIBLE)
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return false;
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if (memcmp(tb->header.oem_id, "APMC0D", ACPI_OEM_ID_SIZE))
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if (memcmp(tb->header.oem_id, "APMC0D", ACPI_OEM_ID_SIZE) &&
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memcmp(tb->header.oem_id, "HPE ", ACPI_OEM_ID_SIZE))
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return false;
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if (!memcmp(tb->header.oem_table_id, "XGENESPC",
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ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 0)
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return true;
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xgene_8250 = true;
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return false;
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if (!memcmp(tb->header.oem_table_id, "ProLiant",
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ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 1)
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xgene_8250 = true;
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return xgene_8250;
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}
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/**
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@@ -182,11 +189,19 @@ int __init parse_spcr(bool earlycon)
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uart = "qdf2400_e44";
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}
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if (xgene_8250_erratum_present(table))
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if (xgene_8250_erratum_present(table)) {
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iotype = "mmio32";
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snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
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table->serial_port.address, baud_rate);
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/* for xgene v1 and v2 we don't know the clock rate of the
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* UART so don't attempt to change to the baud rate state
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* in the table because driver cannot calculate the dividers
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*/
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snprintf(opts, sizeof(opts), "%s,%s,0x%llx", uart, iotype,
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table->serial_port.address);
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} else {
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snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
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table->serial_port.address, baud_rate);
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}
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pr_info("console: %s\n", opts);
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