e1000e: i219 - Increase minimum FIFO read/write min gap
Due to clocking changes in the Skylake platform, there was i219 data corruption. To work around this, HW team reported the need to increase the minimum gap between the PHY FIFO read and write pointers. Signed-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
此提交包含在:
@@ -1437,6 +1437,52 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
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if (ret_val)
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return ret_val;
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if (hw->mac.type == e1000_pch_spt) {
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u16 data;
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u16 ptr_gap;
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if (speed == SPEED_1000) {
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ret_val = hw->phy.ops.acquire(hw);
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if (ret_val)
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return ret_val;
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ret_val = e1e_rphy_locked(hw,
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PHY_REG(776, 20),
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&data);
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if (ret_val) {
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hw->phy.ops.release(hw);
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return ret_val;
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}
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ptr_gap = (data & (0x3FF << 2)) >> 2;
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if (ptr_gap < 0x18) {
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data &= ~(0x3FF << 2);
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data |= (0x18 << 2);
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ret_val =
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e1e_wphy_locked(hw,
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PHY_REG(776, 20),
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data);
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}
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hw->phy.ops.release(hw);
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if (ret_val)
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return ret_val;
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}
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}
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}
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/* I217 Packet Loss issue:
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* ensure that FEXTNVM4 Beacon Duration is set correctly
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* on power up.
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* Set the Beacon Duration for I217 to 8 usec
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*/
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if ((hw->mac.type == e1000_pch_lpt) || (hw->mac.type == e1000_pch_spt)) {
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u32 mac_reg;
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mac_reg = er32(FEXTNVM4);
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mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK;
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mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_8USEC;
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ew32(FEXTNVM4, mac_reg);
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}
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/* Work-around I218 hang issue */
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