PCI: imx6: Do not switch speed if Gen2 is disabled
Save a bit of time and avoid going through link speed change procedure in configuration where link max speed is limited to Gen1 in DT. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: yurovsky@gmail.com Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Dong Aisheng <dongas86@gmail.com> Cc: linux-arm-kernel@lists.infradead.org
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committed by
Bjorn Helgaas

parent
e6dcd87fff
commit
93b226f9c6
@@ -533,13 +533,10 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
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tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
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tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
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tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2;
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tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2;
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dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);
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dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);
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} else {
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dev_info(dev, "Link: Gen2 disabled\n");
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}
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/*
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/*
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* Start Directed Speed Change so the best possible speed both link
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* Start Directed Speed Change so the best possible
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* partners support can be negotiated.
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* speed both link partners support can be negotiated.
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*/
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*/
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tmp = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
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tmp = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
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tmp |= PORT_LOGIC_SPEED_CHANGE;
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tmp |= PORT_LOGIC_SPEED_CHANGE;
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@@ -568,6 +565,9 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
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dev_err(dev, "Failed to bring link up!\n");
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dev_err(dev, "Failed to bring link up!\n");
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goto err_reset_phy;
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goto err_reset_phy;
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}
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}
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} else {
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dev_info(dev, "Link: Gen2 disabled\n");
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}
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tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCSR);
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tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCSR);
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dev_info(dev, "Link up, Gen%i\n", (tmp >> 16) & 0xf);
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dev_info(dev, "Link up, Gen%i\n", (tmp >> 16) & 0xf);
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